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#110092 - 07/02/17 03:20 PM BBC Tube WIP  
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Pernod Offline
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I'm starting to finally add various Tube devices to the BBC Micro range. These are 2nd processors that can be added and the official Acorn devices include 6502, 65C102, Z80, 32016, 80186, 80286, ARM. They (parasite) communicate with the BBC Micro (host) via a Tube ULA (Ferranti and later Acorn). The Tube ULA is fairly well documented and I've added this as a new machine device (tube). When working we'll be able to promote some machines to working bbcmt, bbcm512 and support the currently not supported software lists bbc_flop_6502, bbc_flop_z80, etc.

So far I have 6502 and almost 65C102 working, just need to check interrupts are fully handled between host and parasite CPU's.
6502 2nd Processor:
[Linked Image]
The Z80 is in progress but I'll come back to that later.

I need a little advice on the 80186. The Tube device has 8 registers to be addressed from the parasite CPU. The 8-bit CPU's map these consecutively so I have handlers parasite_r, parasite_w and for the Z80 are addressed:
Code
static ADDRESS_MAP_START(tube_z80_io, AS_IO, 8, bbc_tube_z80_device)
	AM_RANGE(0x00, 0x07) AM_DEVREADWRITE("ula", tube_device, parasite_r, parasite_w)
ADDRESS_MAP_END

For the 80186 the registers are mapped into even locations only:
Code
static ADDRESS_MAP_START(tube_x86_io, AS_IO, 16, bbc_tube_80186_device)
	AM_RANGE(0x80, 0x8e) AM_DEVREADWRITE8("ula", tube_device, parasite_r, parasite_w, 0x00ff)
ADDRESS_MAP_END

Is there a way to map my 8 registers into even locations only, ie. 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e. Or should I just create another set of handlers in my tube_device, parasite_x86_r, parasite_x86_w?

The 80186 co-processor has 512K RAM and 16K ROM and memory map is:
00000h to 3FFFFh : Lower 256kb of RAM
40000h to 7FFFFh : Upper 256kb of RAM
80000h to BFFFFh : Upper 256kb of RAM
C0000h to FFFFFh : ROM

My address map for this is:
Code
static ADDRESS_MAP_START(tube_x86_mem, AS_PROGRAM, 16, bbc_tube_80186_device)
	AM_RANGE(0x00000, 0x3ffff) AM_RAM
	AM_RANGE(0x40000, 0x7ffff) AM_RAM AM_MIRROR(0x80000)
	AM_RANGE(0xc0000, 0xc3fff) AM_ROM AM_REGION("bootstrap", 0) AM_MIRROR(0x3c000)
ADDRESS_MAP_END

But am unsure of my AM_MIRROR's and when run I don't see my bootstrap region anywhere in memory, am expecting to see it mirrored throughout c0000-fffff.


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#110097 - 07/02/17 03:58 PM Re: BBC Tube WIP [Re: Pernod]  
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Originally Posted by Pernod

For the 80186 the registers are mapped into even locations only:
Code
static ADDRESS_MAP_START(tube_x86_io, AS_IO, 16, bbc_tube_80186_device)
	AM_RANGE(0x80, 0x8e) AM_DEVREADWRITE8("ula", tube_device, parasite_r, parasite_w, 0x00ff)
ADDRESS_MAP_END

Is there a way to map my 8 registers into even locations only, ie. 0x80, 0x82, 0x84, 0x86, 0x88, 0x8a, 0x8c, 0x8e. Or should I just create another set of handlers in my tube_device, parasite_x86_r, parasite_x86_w?

That's right, I think. Using a 0xff mask will map it into the even addresses on a little endian machine like the 80186.

#110100 - 07/02/17 05:43 PM Re: BBC Tube WIP [Re: Pernod]  
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Yeah, the 0x00ff mask should be correct.

#110102 - 07/02/17 06:20 PM Re: BBC Tube WIP [Re: crazyc]  
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Originally Posted by crazyc
That's right, I think. Using a 0xff mask will map it into the even addresses on a little endian machine like the 80186.

Yep, that seems to work and the device does now boot, but only if I remove
Code
AM_RANGE(0x40000, 0x7ffff) AM_RAM AM_MIRROR(0x80000)
and it reports 256K.
So what should my AM_MIRROR be to not also mirror at 0xc0000-0xfffff?


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#110104 - 07/02/17 06:38 PM Re: BBC Tube WIP [Re: Pernod]  
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I'm not sure there is a way to do that. You might have to do
Code
AM_RANGE(0x40000, 0x7ffff) AM_RAM AM_SHARE("ram")
AM_RANGE(0x80000, 0xbffff) AM_RAM AM_SHARE("ram")

#110121 - 07/03/17 06:43 PM Re: BBC Tube WIP [Re: Pernod]  
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So when adding my new tube_device to mess.lua do I also add it to arcade.lua, but commented out? I see lots of MESS MACHINES in arcade.lua but commented out. What's the preferred practice?


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#110165 - 07/05/17 01:59 PM Re: BBC Tube WIP [Re: Pernod]  
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A little more progress but I sometimes get
Code
[:tube:65c102:maincpu] Exceeded pending input line event queue on device ':tube:65c102:maincpu'!
in my log. What does it mean, and how can I avoid it?

Also had fun with my memory map as I use a flag to switch out ROM in a handler. Wish I'd known about machine().side_effect_disabled() sooner.


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#110166 - 07/05/17 02:32 PM Re: BBC Tube WIP [Re: Pernod]  
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Stuff that arcade machines don't use only needs to be in mess.lua.

The error message about the input line queue means the 65c102 isn't servicing and lowering the interrupts fast enough. You may need a higher MCFG_QUANTUM() value if the 65c102 is otherwise hooked up correctly.

#110205 - 07/07/17 11:19 AM Re: BBC Tube WIP [Re: R. Belmont]  
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Originally Posted by R. Belmont
The error message about the input line queue means the 65c102 isn't servicing and lowering the interrupts fast enough. You may need a higher MCFG_QUANTUM() value if the 65c102 is otherwise hooked up correctly.

Thanks, though I more suspect that I need to implement some timing in my new tube_device, will come back to it later.

The 65C102 is now running, though with known interrupt issues:
[Linked Image]

The Z80 is also fully implemented with no known issues. It runs Acorn CP/M from the softlist and Colossal Cave:
[Linked Image] [Linked Image]

Now returning to the 80186, circuit diagram at http://mdfs.net/Info/Comp/BBC/Circuits/Tube/80186copro.gif. It looks like I need to use the TMROUT handlers, need to read up on what these do ...


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#110206 - 07/07/17 12:07 PM Re: BBC Tube WIP [Re: Pernod]  
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From that schematic, Timer 0 toggles the HOLD pin (and appears to have something to do with the DRAM refresh, similar to one of the timers on PCs) and Timer 1 produces NMIs either on the 80186 or the host system via the Tube chip depending how a jumper is set. (The schematic shows it in the "on the 80186" position).

#110208 - 07/07/17 04:17 PM Re: BBC Tube WIP [Re: Pernod]  
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Makes sense to halt the cpu during refresh. Interesting that PCS0 is connected to INT1.

#110554 - 08/09/17 03:01 PM Re: BBC Tube WIP [Re: Pernod]  
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And now have the Casper 68000 2nd Processor running. The software list bbc_flop_68000 is now supported with this.
[Linked Image] [Linked Image]


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#110558 - 08/09/17 06:18 PM Re: BBC Tube WIP [Re: Pernod]  
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Nice work! I'm glad to see the BBC finally hitting its potential in MAME.

#110559 - 08/09/17 08:06 PM Re: BBC Tube WIP [Re: Pernod]  
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Not many more 2nd processors left to add now, and will be enquiring how best to implement the 32016 CPU sometime soon.

Whilst many of these 2nd processors were potentially great for business and educational use, not much software was ever produced specifically for them. And being targeted at businesses meant software was lost rather than being found 20 years later and imaged by home users.

The 6502 2nd Processor can run an enhanced version of Elite, faster and more colours due to having more RAM available for video. Am hoping no-one posts Elite to the Gotta-rum-'em-all thread until I get the video issues fixed to really show this off.


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#110615 - 08/17/17 12:40 PM Re: BBC Tube WIP [Re: Pernod]  
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There's also an internal board, the Cumana 68008 2nd Processor.
Details: http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Cumana_680082ndProcessor.html
Schematics: https://acorn.huininga.nl/pub/docs/...umana_68008BBCUpgrade_CircuitDiagram.pdf

This doesn't use any of the standard ports but inserts into the 6502 socket with the 6502 then moved to the board, so will need a new 'internal' slot. The 68008 has full access to all ram/rom and devices seen by 6502. How can I map the 6502 program space from 0x2000 -> 0xffff into the 68008 program space at 0x0000? The 68008 has it's own 512K ram at 0x80000. I could re-map all bbc banks and devices into the 68008 space but would prefer to just tell it to use same space if possible.

The board will run OS9, and have a collection of floppy images for this device to be softlisted.


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#110616 - 08/17/17 12:54 PM Re: BBC Tube WIP [Re: Pernod]  
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Your best bet is to grab the 6502's address_space and then issue read_byte/write_byte to it from 68008 read/write handlers. Look at the dma_r() / dma_w() functions in src/devices/bus/a2bus/a2bus.cpp. The Apple II's Z80 and 6809 cards use that mechanism to run CP/M and OS-9.

#110617 - 08/17/17 02:19 PM Re: BBC Tube WIP [Re: Pernod]  
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That's exactly what I was looking for, thanks.


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#110628 - 08/20/17 01:56 PM Re: BBC Tube WIP [Re: Pernod]  
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Now have the 80186 co-processor running in the Master 512 (bbcm512). Had this working a couple of weeks ago but been having trouble with floppy formats to get GEM loading.

[Linked Image] [Linked Image] [Linked Image]

The machine is not yet complete as it still needs a mouse device. It's supposed to be capable of reading various PC floppy formats and running some PC software so will try hooking up the ibm5150 software list to check compatibility.

The issue with floppy formats was due to a subtle bug in the wd177x_dsk helper. The number of sectors per track is fixed to that of the first image loaded, and could be the cause of other MT issues reported that use this helper. Need to get this stuff cleaned up and submitted in the next couple of days.

I've been using READ8_DELEGATE instead of read8_delegate(FUNC, which is preferred?


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#110939 - 10/01/17 07:57 PM Re: BBC Tube WIP [Re: Pernod]  
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The 80286 2nd processor was never commercially released, and is only found in a few examples of the ABC 310 that exist. What we know is that it used the same boot ROMs that were found in the later Master 512, and had 1MB RAM. All photos out there seem to be of the same board and no schematics have been found so a little reverse engineering of the boot code was required. The boot ROM detects whether it is running on 80186 or 80286 and acts differently accordingly.

There is no known software specifically developed for the ABC 310 so am running the Master 512 System disk which shows it running on the 80286 and behaves differently from the Master in my previous post.

[Linked Image] [Linked Image]

Last edited by Pernod; 10/01/17 07:58 PM.

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#110941 - 10/01/17 08:32 PM Re: BBC Tube WIP [Re: Pernod]  
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Seems rather pointless since the 80186 was just as fast per processor cycle as the 80286 and it only supports 1MB of RAM anyway. Maybe if it was AT compatible enough to run Windows in standard mode it would make more sense.

#110942 - 10/01/17 08:39 PM Re: BBC Tube WIP [Re: crazyc]  
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Originally Posted by crazyc
Maybe if it was AT compatible enough to run Windows in standard mode it would make more sense.

I have a few floppy images of Windows 1.02, 1.03, 2.03, 2.1 for the RM Nimbus, will see what it does with them.

Edit: Windows complains with 'This version of Windows needs MS-DOS 3.1 or later'

Last edited by Pernod; 10/01/17 09:33 PM.

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#110943 - 10/02/17 02:06 AM Re: BBC Tube WIP [Re: Pernod]  
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Dunno about the BBC Tube video but the Nimbus graphics adapter is rather odd and I'm sure that even if Windows did start it wouldn't be able to draw anything. Without an PIC, PIT or CGA much XT software is out too (of course that's the problem that all non-PC compatible MSDOS computer makers ran into and why they all gave up).

Last edited by crazyc; 10/02/17 02:06 AM.
#111029 - 10/11/17 11:43 AM Re: BBC Tube WIP [Re: Pernod]  
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This may be out of my comfort zone, but if I were to implement the NS32016 cpu can anyone give me some guidance? Is there an existing cpu that I can use as a base starting point?

http://bg-electronics.de/datenblaetter/Schaltkreise/NS32016.pdf


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#111030 - 10/11/17 12:12 PM Re: BBC Tube WIP [Re: Pernod]  
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I don't know that I'd directly base it on any existing CPU core. Your best bet is to look at how a CPU familiar to you is implemented and try to follow (and copy) the structure. That's a little hard because some newer CPU cores (e.g. the 6502 family) are made using a python program to generate the actual opcode handlers. That's generally smart, but it also obfuscates things a bit.

#111031 - 10/11/17 12:47 PM Re: BBC Tube WIP [Re: Pernod]  
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The 6805 family are a "traditional" MAME CPU with an execute loop and opcode handler macros in a table with no regards for interruptible instructions. The mcs40 (4004/4040) is probably the simplest case of a CPU core implemented at bus cycle level. Each phase of the instruction cycle is emulated, and all bus signals are exposed (this is actually necessary for the INTELLEC 4 and Flicker drivers). As ArBee says, the 6502 and H8 are obfuscated because of the additional layer of indirection. However this allows them to get interruptible instruction handling relatively easily for a more CISC architecture.

#111052 - 10/15/17 12:09 AM Re: BBC Tube WIP [Re: Pernod]  
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Originally Posted by Pernod
The 80286 2nd processor was never commercially released, and is only found in a few examples of the ABC 310 that exist. What we know is that it used the same boot ROMs that were found in the later Master 512, and had 1MB RAM. All photos out there seem to be of the same board and no schematics have been found so a little reverse engineering of the boot code was required. The boot ROM detects whether it is running on 80186 or 80286 and acts differently accordingly.

There is no known software specifically developed for the ABC 310 so am running the Master 512 System disk which shows it running on the 80286 and behaves differently from the Master in my previous post.


I've seen some suggestions that the ABC 310 was intended to run Concurrent DOS, which might have been able to use protected mode.

While DOS Plus contains two sets of Tube client code (for the 186 and 286), the 286 code is buggy for type 2 / 3 memory transfers initiated by the host. The transfer address is in the data segment, but the transfer code accesses the corresponding address in the code segment.

#111078 - 10/16/17 11:14 AM Re: BBC Tube WIP [Re: John Elliott]  
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Originally Posted by John Elliott
I've seen some suggestions that the ABC 310 was intended to run Concurrent DOS, which might have been able to use protected mode.

Yeah, I'm not sure it was ever completed though as I've found no evidence that it ever existed. The machine was shown at the PCW show in '84 and looked like it was running some Desktop Manager, maybe GEM. Then there's a review of a preview model in '85 that was running Concurrent CP/M 3.1 as Concurrent DOS was not yet ready.


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#111273 - 11/14/17 10:52 AM Re: BBC Tube WIP [Re: Pernod]  
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Another co-processor for the collection, the ARM Evaluation System connected to a Model B and Master respectively.
[Linked Image] [Linked Image]

Last edited by Pernod; 11/14/17 10:52 AM.

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#111507 - 12/05/17 02:19 PM Re: BBC Tube WIP [Re: Pernod]  
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Originally Posted by Pernod

When this board starts the 68008 is HALTed until 6502 has setup vectors and code in the shared RAM to allow the 68008 to start. The 68008 is then told to RESET by writing 0x34 into the 6821 Control Register B which should trigger my CB2 handler to perform the RESET. The CB2 handler is not triggered though due to CB2 being 0 when started and writing to the Control Register also setting it to 0, CB2 handler is only called when it changes state.

From someone else's notes I have 'Pull up resistor R12 makes CB2 high when it's configured as an input', which can be seen on the RESET/HALT lines from the 68008 on page 2 of the above circuit diagram. The RESET 68000 is connected to CB2 of the 6821 on page 3. How can I implement this?


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#111508 - 12/05/17 03:48 PM Re: BBC Tube WIP [Re: Pernod]  
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I think you'll just have to push it manually at machine start, by writing something like m_pia->cb2_w(1). Remember that one of the M68000's quirks is that its RESET line is both an input and an open-collector output, so if the 68008 code can use RESET instructions and CB2 gets reconfigured as an input, you may also have to add a handler for that.

#111510 - 12/05/17 06:14 PM Re: BBC Tube WIP [Re: AJR]  
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Originally Posted by AJR
I think you'll just have to push it manually at machine start, by writing something like m_pia->cb2_w(1).

Not that simple unfortunately, this will only set the CB2 in state, I need to set the CB2 out state. So I thought about setting CB2 to output and pulling high with:
Code
m_pia_rtc->write(machine().dummy_space(), 0x03, 0x3c);

Startup log before letting machine run with additional logging for pia resets:
Code
[:internal:cumana68k:pia_rtc] PIA control B write = 3C
[:internal:cumana68k:pia_rtc] PIA control B temp = 1
[:internal:cumana68k:pia_rtc] data 01 m_out_cb2 00 .. z 00 m_last_out_cb2_z 00
[:internal:cumana68k] reset68008_w 1
[:internal:cumana68k:sasi:1:harddisk] T10SBC :internal:cumana68k:sasi:1:harddisk: no HD found!
[:internal:cumana68k:pia_sasi] pia6821 reset
[:internal:cumana68k:pia_rtc] pia6821 reset
[:internal:cumana68k:pia_rtc] PIA control B write = 3C
[:internal:cumana68k:pia_rtc] PIA control B temp = 1
[:internal:cumana68k:pia_rtc] data 01 m_out_cb2 00 .. z 00 m_last_out_cb2_z 00
[:internal:cumana68k] reset68008_w 1
[:internal:cumana68k:sasi:1:harddisk] T10SBC :internal:cumana68k:sasi:1:harddisk: no HD found!
[:internal:cumana68k:pia_sasi] pia6821 reset
[:internal:cumana68k:pia_rtc] pia6821 reset
[:internal:cumana68k:wd2797] cmd: seek 1 0 (track=0)

Shouldn't child devices be reset before their parents during startup? My cumana68k device is setting CB2 in it's reset() but the pia is reset afterwards, resetting m_out_cb2=0.


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#111511 - 12/05/17 06:34 PM Re: BBC Tube WIP [Re: Pernod]  
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Use device_reset_after_children() if you need to be called after the child devices.

#111512 - 12/05/17 07:48 PM Re: BBC Tube WIP [Re: Duke]  
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Originally Posted by Duke
Use device_reset_after_children() if you need to be called after the child devices.

Thanks, never used that before. Now progressing to attempt to boot OS-9 from floppy.


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#111556 - 12/08/17 01:58 PM Re: BBC Tube WIP [Re: Pernod]  
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Here's a rarity, practically a whole Archimedes as a 2nd processor:
http://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_A5002ndProc.html
[Linked Image]
It has it's own video output but haven't yet managed to get anything out of it, in progress.


BBC Model B, ATPL Sidewise, Acorn Speech, 2xWatford Floppy Drives, AMX Mouse, Viglen case, etc.
#111557 - 12/08/17 02:17 PM Re: BBC Tube WIP [Re: Pernod]  
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R. Belmont Offline
R. Belmont  Offline

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That's pretty crazy, but it makes sense as a developmental step.

#111559 - 12/08/17 05:29 PM Re: BBC Tube WIP [Re: Pernod]  
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Pernod Offline
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Pernod  Offline
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UK
At the moment I've just copied most of the archimedes machine into my device, as I needed to map the Tube ULA into the IOC. Can I somehow include the archimedes driver_device in my bus device?

I also have ROMs from a prototype A500, http://chrisacorns.computinghistory.org.uk/Computers/A500.html, which will also need changes in IOC for different FDC, econet and winchester. Should I just add them all as optional devices?


BBC Model B, ATPL Sidewise, Acorn Speech, 2xWatford Floppy Drives, AMX Mouse, Viglen case, etc.
#111560 - 12/08/17 06:18 PM Re: BBC Tube WIP [Re: Pernod]  
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Just Desserts Offline
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Just Desserts  Offline
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Posts: 1,605
Originally Posted by Pernod
Can I somehow include the archimedes driver_device in my bus device?


Please don't. If the Archimedes driver_device doesn't already implement the chipset as a set of devices, it should be reworked to do that first.

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