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#108220 - 12/20/16 06:02 PM Re: PC/XT/AT (inside) WIP topic [Re: Kale]  
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shattered Offline
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Its SuperIO chip (T7885) only has one DMAC -- see appendix A of maintenance manual (found on http://www.minuszerodegrees.net/manuals/Toshiba/Toshiba.htm)

edit:

Those 160 bytes of 'Backup RAM' are used to store config.sys, apparently:
.

BIOS has support for EMS memory cards, so I'll try to add one -- haven't found accurate hardware specs for those yet.

Last edited by shattered; 12/20/16 11:50 PM.
#108223 - 12/21/16 12:35 AM Re: PC/XT/AT (inside) WIP topic [Re: shattered]  
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crazyc Offline
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Originally Posted By shattered
BIOS has support for EMS memory cards, so I'll try to add one -- haven't found accurate hardware specs for those yet.
Tried this once with the intel aboveboard, there's really no good info about those anywhere. I had to disassemble the driver and even that wasn't clear. This is as far as I got if you want to try.

Code:
#include "emu.h"
#include "machine/isa_aboveboard.h"

const device_type ISA8_ABOVEBOARD = &device_creator<isa_aboveboard_device>;

isa_aboveboard_device::isa_aboveboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
	: device_t(mconfig, ISA8_ABOVEBOARD, "ISA8_ABOVEBOARD", tag, owner, clock),
		device_isa8_card_interface(mconfig, *this),
		device_slot_card_interface(mconfig, *this) {
}

void isa_aboveboard_device::device_start() {
	m_frameidx = 255;
	set_isa_device();
	m_isa->install_device(0x0218, 0x0219, 0, 0, read8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port0_r), this), write8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port0_w), this));
	m_isa->install_device(0x4218, 0x4219, 0, 0, read8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port1_r), this), write8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port1_w), this));
	m_isa->install_device(0x8218, 0x8219, 0, 0, read8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port2_r), this), write8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port2_w), this));
	m_isa->install_device(0xc218, 0xc219, 0, 0, read8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port3_r), this), write8_delegate(FUNC(isa_aboveboard_device::isa_aboveboard_port3_w), this));
}

void isa_aboveboard_device::device_reset() {
	if(m_frameidx != 255) {
		map_page(0, 0);
		map_page(1, 0);
		map_page(2, 0);
		map_page(3, 0);
	}
	m_frameidx = 255;
	memset(m_page, 0, sizeof(m_page));
	memset(m_ram, 0, sizeof(m_ram));
}


UINT8 isa_aboveboard_device::isa_aboveboard_port_r(address_space &space, offs_t offset, UINT8 mem_mask, int porthi) {
	UINT8 data = 0;
	switch(offset) {
	case 0:
		data = m_page[porthi];
		break;
	case 1:
		if(m_frameidx == 255) break;
		data = (m_frameidx & (1 << porthi))?0x80:0;
		break;
	}
	logerror("aboveboard: read %d %d %X\n", porthi, offset, data);
	return data;
}

void isa_aboveboard_device::isa_aboveboard_port_w(address_space &space, offs_t offset, UINT8 data, UINT8 mem_mask, int porthi) {
	logerror("aboveboard: write %d %d %X\n", porthi, offset, data);
	UINT8 newframe;

	if(m_frameidx == 255) m_frameidx = 0;
	switch(offset) {
	case 0:
		if(m_page[porthi] != data) {
			m_page[porthi] = data;
			map_page(porthi, data);
		}
		break;
	case 1:
		if(data & 0x80) newframe = m_frameidx | (1<<porthi);
		else newframe = m_frameidx & ~(1<<porthi);
		newframe &= 7;
		if(newframe != m_frameidx) {
			map_page(0, 0);
			map_page(1, 0);
			map_page(2, 0);
			map_page(3, 0);
			m_frameidx = newframe;
			map_page(0, m_page[0]);
			map_page(1, m_page[1]);
			map_page(2, m_page[2]);
			map_page(3, m_page[3]);
		}			
		break;
	}
}

void isa_aboveboard_device::map_page(int host_page, int ram_page) {
	const UINT8 pgframe[8][4] = {{0xd0, 0xc4, 0xc8, 0xcc},
								 {0xd0, 0xd4, 0xc8, 0xcc},
								 {0xd0, 0xd4, 0xd8, 0xcc},
								 {0xd0, 0xd4, 0xd8, 0xdc},
								 {0xe0, 0xd4, 0xd8, 0xdc},
								 {0xe0, 0xe4, 0xd8, 0xdc},
								 {0xe0, 0xe4, 0xe8, 0xdc},
								 {0xe0, 0xe4, 0xe8, 0xec}};
	UINT32 addr = pgframe[m_frameidx][host_page]<<12;
	for(int i = 0; i < 4; i++) {
		if((addr >> 12) == m_mapped[i]) break; // we've mapped this address
		if(i == 3 && !m_isa->is_option_rom_space_available((offs_t)addr, 16*1024))
			return; // address in use
	}
	m_mapped[host_page] = addr >> 12;

	if(ram_page & 0x80) {
		char ems[7] = {'A', 'B', 'E', 'M', 'S', '0', 0};
		ems[5] += host_page;
		m_isa->unmap_bank(addr, addr + 0x3fff, 0, 0);
		m_isa->install_bank(addr, addr + 0x3fff, 0, 0, ems, m_ram[ram_page & ~0x80]);
	} else
		m_isa->unmap_bank(addr, addr + 0x3fff, 0, 0);
}

READ8_MEMBER(isa_aboveboard_device::isa_aboveboard_port0_r) {
	return isa_aboveboard_port_r(space, offset, mem_mask, 0);
}

WRITE8_MEMBER(isa_aboveboard_device::isa_aboveboard_port0_w) {
	isa_aboveboard_port_w(space, offset, data, mem_mask, 0);
}

READ8_MEMBER(isa_aboveboard_device::isa_aboveboard_port1_r) {
	return isa_aboveboard_port_r(space, offset, mem_mask, 1);
}

WRITE8_MEMBER(isa_aboveboard_device::isa_aboveboard_port1_w) {
	isa_aboveboard_port_w(space, offset, data, mem_mask, 1);
}

READ8_MEMBER(isa_aboveboard_device::isa_aboveboard_port2_r) {
	return isa_aboveboard_port_r(space, offset, mem_mask, 2);
}

WRITE8_MEMBER(isa_aboveboard_device::isa_aboveboard_port2_w) {
	isa_aboveboard_port_w(space, offset, data, mem_mask, 2);
}

READ8_MEMBER(isa_aboveboard_device::isa_aboveboard_port3_r) {
	return isa_aboveboard_port_r(space, offset, mem_mask, 3);
}

WRITE8_MEMBER(isa_aboveboard_device::isa_aboveboard_port3_w) {
	isa_aboveboard_port_w(space, offset, data, mem_mask, 3);
}



Code:
#ifndef ISA_ABOVEBOARD_H__
#define ISA_ABOVEBOARD_H__

#include "emu.h"
#include "machine/isa.h"

class isa_aboveboard_device: public device_t,
						  public device_isa8_card_interface,
						  public device_slot_card_interface
{
public:
	isa_aboveboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);

	DECLARE_READ8_MEMBER(isa_aboveboard_port0_r);
	DECLARE_WRITE8_MEMBER(isa_aboveboard_port0_w);
	DECLARE_READ8_MEMBER(isa_aboveboard_port1_r);
	DECLARE_WRITE8_MEMBER(isa_aboveboard_port1_w);
	DECLARE_READ8_MEMBER(isa_aboveboard_port2_r);
	DECLARE_WRITE8_MEMBER(isa_aboveboard_port2_w);
	DECLARE_READ8_MEMBER(isa_aboveboard_port3_r);
	DECLARE_WRITE8_MEMBER(isa_aboveboard_port3_w);
protected:
	virtual void device_start();
	virtual void device_reset();
private:
	UINT8 isa_aboveboard_port_r(address_space &space, offs_t offset, UINT8 mem_mask, int porthi);
	void isa_aboveboard_port_w(address_space &space, offs_t offset, UINT8 data, UINT8 mem_mask, int porthi);
	void map_page(int host_page, int ram_page);

	UINT8 m_frameidx;
	UINT8 m_page[4];
	UINT8 m_mapped[4];
	UINT8 m_ram[128][16*1024];
};

extern const device_type ISA8_ABOVEBOARD;

#endif

Last edited by crazyc; 12/21/16 12:36 AM.
#108224 - 12/21/16 01:43 AM Re: PC/XT/AT (inside) WIP topic [Re: Kale]  
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Lord Nightmare Offline
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"When life gives you zombies... *CHA-CHIK!* ...you make zombie-ade!"
#108225 - 12/21/16 03:18 AM Re: PC/XT/AT (inside) WIP topic [Re: Lord Nightmare]  
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Vas Crabb Offline
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Originally Posted By Lord Nightmare

That describes the interface provided by the EMM to applications, not the interface between the EMM and the hardware.

#108227 - 12/21/16 06:34 AM Re: PC/XT/AT (inside) WIP topic [Re: Kale]  
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robcfg Offline
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I got by chance the OS/2 driver disk for the Above2 board. PM me if you'd like an image of the disk.

#108228 - 12/21/16 09:40 AM Re: PC/XT/AT (inside) WIP topic [Re: Kale]  
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Vas Crabb Offline
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There were several different, incompatible cards marketed under the Above Board name. I know of at least these variants:
  • Original Above Board with 72 sockets for 64k*1 or 256k*1 DRAMs and 8-bit edge connector, all DIP support chips
  • Above Board Plus I/O still with 72 sockets for DRAMs but with 16-bit edge connector, higher integration chips (big PLCC), and COM/LPT ports on the same card
  • Above Board Plus as above but with the COM/LPT support components unpopulated
  • Above Board 2 Plus for PS/2 50, 50Z and 60 with eight 30-pin SIMM sockets (100ns SIMMs for zero wait state operation, supports 256kB and 1MB SIMMS) and 16-bit Micro Channel interface
  • Above Board/MC - newer 16-bit Micro Channel version with support for faster SIMMs and fast memory cycle on Model 80 type 1
  • Above Board/MC32 - as above but with 32-bit Micro Channel interface

OS/2 would have required at least the Above Board Plus.

#108229 - 12/21/16 09:41 AM Re: PC/XT/AT (inside) WIP topic [Re: robcfg]  
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Vas Crabb Offline
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Originally Posted By robcfg
I got by chance the OS/2 driver disk for the Above2 board. PM me if you'd like an image of the disk.

I assume you mean the Above Board 2, which isn't the same thing at all, unfortunately.

#108230 - 12/21/16 10:26 AM Re: PC/XT/AT (inside) WIP topic [Re: Vas Crabb]  
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robcfg Offline
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No problem.

Just in case, it's the OS/2 driver disk for the Intel Above 2 Plus board.

I'll keep it around.

#108235 - 12/21/16 06:34 PM Re: PC/XT/AT (inside) WIP topic [Re: Vas Crabb]  
Joined: Jan 2011
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Al Kossow Offline
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Al Kossow  Offline
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Originally Posted By Vas Crabb
Originally Posted By Lord Nightmare

That describes the interface provided by the EMM to applications, not the interface between the EMM and the hardware.


is this all there is to it?

https://www.lo-tech.co.uk/wiki/Lo-tech_2MB_EMS_Board

https://en.wikipedia.org/wiki/Expanded_memory
http://www.borrett.id.au/computing/art-1989-01-02.htm

Last edited by Al Kossow; 12/21/16 11:04 PM.
#108236 - 12/21/16 06:38 PM Re: PC/XT/AT (inside) WIP topic [Re: Kale]  
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R. Belmont Offline
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That board sounds suitably simple: 4 16K windows in a 64K memory region, controlled by 4 I/O addresses.

And we'd like to softlist driver disks in general, even for stuff we don't support, because finding them is often the barrier preventing emulating some piece of hardware.

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