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I've been working on the Intel iPDS driver, which is now at the stage where it is starting to boot from a floppy disk. Here is a snap:



The ROM and RAM in this system are overlapped as follows:

ROM: 0x0000 - 0x7fff
RAM: 0x0000 - 0xffff

When the O/S starts up it writes to I/O port 0xF0 to disable the ROM and make the lower half of the RAM visible. How do I acheive this with MESS? (i.e. How do I disable the address map entry for the ROM at runtime?) Is there another driver I can look at to see an example?

This is the reason for the RAM error show above.

Matt

You want to use a bankdev device for that. Look at the RAM/ROM switching from 0xd000-0xffff in the new drivers/apple2.c for an example.

Basically what it does is it allows an address range to be a view onto a second address map, and then a fixed bank offset is applied. In the Apple II case, the second map is the inhbank_map, and we set the size at 0x3000 so setting bank 0 gives the ROM and setting bank 1 gives an offset of 0x3000 and accesses the inh_r/inh_w handlers.

Thanks. That seems to have fixed it:



CP/M seems to boot OK too:



Matt

Very nice!

Did anything come of this? Nothing's changed in MESS.

Sorry, I haven't submitted it yet but I will shortly.

Whilst developing this I found that the 164196.bin ROM file was corrupt so I used an older ROM version I found on bitsavers. Since then I've made a new dump of the later version from my own iPDS.

Ah, ok. I look forward to your submission.