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Magnetic core memory emulation for PDP8? #101900 10/07/15 08:57 AM
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Edstrom Offline OP
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Has anyone given this subject some thoughts? I've just read the report by two guys that made a core memory shield for Arduino:

http://www.corememoryshield.com/index.html

I wonder if the software on the PDP8:s etc had so close knowledge about how the core memory worked and that the process of reading of writing was done partly by software? Or was it fully abstracted by hardware and just mapped into memory so there is no need to emulate this level at all?

Re: Magnetic core memory emulation for PDP8? [Re: Edstrom] #101902 10/07/15 09:50 AM
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Just Desserts Offline
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It was fully abstracted by hardware, so no need to emulate at that level.

As for the PDP-8, the current CPU core is just a shell with nothing implemented. I've back-burnered it for the time being as there are some interesting issues associated with emulating it that I've yet to work through - namely, the modular nature of the IOB instruction.

The different peripherals for the PDP-8 actually added their own opcodes that handled certain bit configurations of the overall IOB instruction. Given the fact that ideally, these peripherals would be implemented as slot devices, it raises the question of how I would go about implementing support for them in the disassembler.

Re: Magnetic core memory emulation for PDP8? [Re: Edstrom] #101906 10/07/15 10:31 AM
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Edstrom Offline OP
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Hehe, I just love those oldies and how they innovated things. I believe that the 8087 FPU is doing something similar, interpreting unknown opcodes outside the CPU.

There are also a bunch of descrete CPU:s that would be interesting to think about, like the Ericsson AXE switchboard CPU for instance, for which the disassembler might be a challange because new opcodes were probably added between revisions of the board (thats is just my guess): http://ericssonhistory.com/Global/Ericss...l_61_1984_4.pdf

Re: Magnetic core memory emulation for PDP8? [Re: Edstrom] #101916 10/07/15 12:10 PM
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JD: I'd suggest IOB execution and disassembly callbacks from the CPU core that the driver would hook directly up to the bus, and the bus would pass it through the relevant device(s) depending on what's plugged in. (Do bits in the instruction address specific device(s), or is the opcode just passed on the bus in the hopes that something claims it?)

Re: Magnetic core memory emulation for PDP8? [Re: Edstrom] #101918 10/07/15 12:56 PM
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Micko Offline
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Existing driver for PDP1 is actually have same type of handling IOB, so maybe a good approach would be updating PDP1 first to use that mechanism.

Re: Magnetic core memory emulation for PDP8? [Re: R. Belmont] #101920 10/07/15 03:42 PM
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AaronGiles Online Content
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Originally Posted By R. Belmont
JD: I'd suggest IOB execution and disassembly callbacks from the CPU core that the driver would hook directly up to the bus, and the bus would pass it through the relevant device(s) depending on what's plugged in. (Do bits in the instruction address specific device(s), or is the opcode just passed on the bus in the hopes that something claims it?)

I'd recommend even going a step further and create a device interface class a la the Z80 daisy chain. The interface class can have methods for the disassembler and execution, and all IOB devices can derive from it.


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