Previous Thread
Next Thread
Print Thread
Page 6 of 19 1 2 4 5 6 7 8 18 19
Edstrom #102767 11/25/15 12:57 PM
Joined: Mar 2001
Posts: 16,923
Likes: 57
R
Very Senior Member
Offline
Very Senior Member
R
Joined: Mar 2001
Posts: 16,923
Likes: 57
That's D24, not A24. Note the "config.data_width()". We support an arbitrary number of address bits, but data bits must be 8/16/32/64.

Last edited by R. Belmont; 11/25/15 12:58 PM.
Edstrom #102769 11/25/15 02:58 PM
Joined: Aug 2015
Posts: 405
Edstrom Offline OP
Senior Member
OP Offline
Senior Member
Joined: Aug 2015
Posts: 405
Ah, good news, I am sorry but I did mix up some arguments to the address_space_config struct. It makes sense now, no need for core team to do anything here, I just need to understand what I am doing better.

The VME64 standard introduces some new concepts such as the A40 adressing also available for single connector boards by combining the A24 (A1-A23) and D16 (D0-D15) lines where the latter are multiplexed with A24-A39 addresslines. Life is never simple... there is also an optional Configuration ROM capability defined. I think I leave the VME64 extension for later too.

I am still curious if the use of an extra addresspace to map the VME boards makes sense. In theory the Address modifiers adds and extra 8 address bits makin it possible to address 2^40 bytes of data also in a VME32 system. So maybe I can just use that approach and map the whole thing into a A40 address space in AS_PROGRAM?


Because I can
Edstrom #102851 11/30/15 06:52 PM
Joined: Aug 2015
Posts: 405
Edstrom Offline OP
Senior Member
OP Offline
Senior Member
Joined: Aug 2015
Posts: 405

Ok, after some tinkering with the memory system I have come up with the following implementation plan for VME, just tell me it is plain stupid or I will just try it out. smile

Code:
/*                                                                                                                                                                
 * Implementation notes                                                                                                                                           
 *                                                                                                                                                                
 * 1) VME address space is allocated as an extension of AS_PROGRAM adress space of the                                                                            
 *    controller board in SLOT 0                                                                                                                                  
 *                                                                                                                                                                
 * 2) An adressmodifier keeps track of the offset of each entry and type of access and                                                                            
 *    is determined by a bank tag, eg "vme16_priv", "vme24" etc, set by the card device when                                                                      
 *    registering itself with the VME device.                                                                                                                     
 *                                                                                                                                                                
 * 3) Overlapping areas between VME and local adress space is implemented                                                                                         
 *    as banks by the VME device, automatically by mapping in the appropriate bank based on                                                                       
 *    the adressmodifier.                                                                                                                                         
 */


Because I can
Edstrom #102855 12/01/15 10:07 AM
Joined: Jun 2001
Posts: 476
Likes: 3
O
Senior Member
Offline
Senior Member
O
Joined: Jun 2001
Posts: 476
Likes: 3
It's suboptimal. I can't right now but I'll try to tell you about a better design tonight.

Edstrom #102865 12/02/15 12:18 PM
Joined: Aug 2015
Posts: 405
Edstrom Offline OP
Senior Member
OP Offline
Senior Member
Joined: Aug 2015
Posts: 405
Thanks, I just need a conceptual direction, let me know and I am on it.


Because I can
Edstrom #102905 12/06/15 11:37 AM
Joined: Jun 2001
Posts: 476
Likes: 3
O
Senior Member
Offline
Senior Member
O
Joined: Jun 2001
Posts: 476
Likes: 3
Ok, so the fundamental idea is simple: Going through a memory space is expensive, so you don't want to go through two if you can avoid it. OTOH, modifying a memory map is expensive too (even if I hope to reduce that one day), so you don't want to change it too often either.

In the case of laying out devices in memory, it's usually done only once or twice (firmware, os) in a session's life, so the best way is, I think, directly modifying the main cpu memory map.

You can see an example of that point of view in the new pci stuff (pci.h/pci.cpp and derivatives). Each pci device publishes five address maps (four that go in the main cpu's memory, one for configuration). The root device (and bridge devices) takes all these maps and install then in the appropriate address space with the correct offset and limits.

See pci_device::map_device, pci_bridge_device::map_device and pci_host_device::regenerate_mapping to see how it can be done.

OG.

Edstrom #102908 12/06/15 07:59 PM
Joined: Aug 2015
Posts: 405
Edstrom Offline OP
Senior Member
OP Offline
Senior Member
Joined: Aug 2015
Posts: 405
Got it, I have an idea how to implement the address modifier thing with only one address space that I will try out. It will not support all the corner cases but I'll make sure to check for those and and insert proper warnings when seen.

I figure emulation performance is mostly an issue for op code fetches and intensive data handling which ralrely occured over the VME bus, nothing stops a poor system design in that respect. However there are support for DMA reads which is used reading data buffers from disk/tape controller boards etc but it was quite slow in reality too.


Because I can
shattered #104989 04/07/16 09:38 PM
Joined: May 2012
Posts: 555
Likes: 1
S
Senior Member
Offline
Senior Member
S
Joined: May 2012
Posts: 555
Likes: 1
Originally Posted By shattered
I've borrowed Force ISCSI-1 hardware manual and going to scan it soon, guess that bitsavers would be interested in that?


Better late than never, I guess...

https://drive.google.com/file/d/0B8vr5xq7JIHPaUdFVnhfdGNzRmc/view?usp=drivesdk

Datasheets for 68153 BIM, 68230 PIT, 68450 DMAC, NCR 5386S, NCR 8310, and WD1772 are included into the document binder.

Edstrom #104991 04/08/16 12:01 AM
Joined: Mar 2006
Posts: 1,073
Likes: 5
L
Very Senior Member
Offline
Very Senior Member
L
Joined: Mar 2006
Posts: 1,073
Likes: 5
Can you scan the datasheets as well? or are they at the end of that pdf you posted?


"When life gives you zombies... *CHA-CHIK!* ...you make zombie-ade!"
Edstrom #104994 04/08/16 06:34 AM
Joined: May 2012
Posts: 555
Likes: 1
S
Senior Member
Offline
Senior Member
S
Joined: May 2012
Posts: 555
Likes: 1
They're in the middle of it.

Page 6 of 19 1 2 4 5 6 7 8 18 19

Link Copied to Clipboard
Who's Online Now
3 members (Pernod, 2 invisible), 36 guests, and 3 robots.
Key: Admin, Global Mod, Mod
ShoutChat
Comment Guidelines: Do post respectful and insightful comments. Don't flame, hate, spam.
Forum Statistics
Forums9
Topics9,103
Posts119,270
Members5,019
Most Online890
Jan 17th, 2020
Our Sponsor
These forums are sponsored by Superior Solitaire, an ad-free card game collection for macOS and iOS. Download it today!

Superior Solitaire
Forum hosted by www.retrogamesformac.com