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rfka01 #99643 05/07/15 04:24 PM
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Great work!

MMI6308 PROM (in line 209) should be E11 on a Rainbow 100-A and E13 on 100-B (from schematics).

Last edited by Bavarese; 05/07/15 04:25 PM.
rfka01 #99647 05/07/15 05:59 PM
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Fixed, Thanks!

LN


"When life gives you zombies... *CHA-CHIK!* ...you make zombie-ade!"
rfka01 #99674 05/09/15 10:14 AM
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Finally some progress on the Rainbow driver:

First, the Z80 still wrote to reserved address space (...with GIT code).
Caused 8088 crashes - and Z80 test failures! Fall through wasn't right - see correction below...

Code:
WRITE8_MEMBER(rainbow_state::share_z80_w)
{
	if (m_zflip)
	{
		if (offset < 0x8000)
		{
			m_shared[offset + 0x8000] = data;
			return; // [!]
		}
		else if (offset < 0x8800)
		{
			m_z80_private[offset & 0x7ff] = data; // SRAM
			return; // [!]
		}

		m_shared[offset ^ 0x8000] = data;
	}
	else
	{
		if (offset < 0x800)
			m_z80_private[offset] = data; // SRAM
		else
			m_shared[offset] = data;
	}
	return;
}



(Second)

* (from schematics) the TEST input of the 8088 (active low) is wired to
IRQ_COMM_PTR_INTR_L - the built-in 7201 COMM/Printer interrupt.

This is used for on board tests (WAIT loop). See previous text about the unimplemented loopback.


We really should fix the comm and printer in- and outputs to get the LK201 keyboard back on track. Unfortunately I have no clue how to set 8251 baud rates or program the MPSC.

So, what is left? A list of registers still unmapped in 'rainbow.c':

Code:
[06] : MPSC bit rates (see page 21 of PC 100 SPEC)
[0e] : PRINTER BIT RATE REGISTER (WO)

[40]  COMMUNICATIONS DATA REGISTER (MPSC)
[41]  PRINTER DATA REGISTER (MPSC)
[42]  COMMUNICATIONS CONTROL / STATUS REGISTER (MPSC)
[43]  PRINTER CONTROL / STATUS REGISTER (MPSC)


Mirror registers (?) not correctly serviced in LK201:

Code:
0x12 R/W
':lk201:lk201_cpu' (0313): unmapped program memory read from 0012 & FF
':lk201:lk201_cpu' (0392): unmapped program memory read from 0012 & FF
':lk201:lk201_cpu' (0C7A): unmapped program memory read from 0012 & FF

':lk201:lk201_cpu' (0104): unmapped program memory write to 0012 = 00 & FF
':lk201:lk201_cpu' (0185): unmapped program memory write to 0012 = 40 & FF
':lk201:lk201_cpu' (0392): unmapped program memory write to 0012 = 01 & FF

0x13 Read
':lk201:lk201_cpu' (0112): unmapped program memory read from 0013 & FF

0x16 WRITE
':lk201:lk201_cpu' (0110): unmapped program memory write to 0016 = 81 & FF
':lk201:lk201_cpu' (0177): unmapped program memory write to 0016 = 00 & FF

0x17 R/W
':lk201:lk201_cpu' (0114): unmapped program memory read from 0017 & FF
':lk201:lk201_cpu' (0181): unmapped program memory write to 0017 = A7 & FF

0x1A READ
':lk201:lk201_cpu' (0175): unmapped program memory read from 001A & FF

0x1B READ
':lk201:lk201_cpu' (0179): unmapped program memory read from 001B & FF


Any hints are welcome! Thanks!

@R.Belmont: you made interesting statements back then

Are there new developments (or old code not yet in GIT)...?

It is unlikely i will be able to fix anything related to the 8251 / MPSC.
smile

Last edited by Bavarese; 05/09/15 10:56 AM.
rfka01 #101801 09/30/15 01:23 PM
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Real Life Syndrom caught me.

I recently found a backup / copy of the "Rainbow 100 Home Page" (by Jeff Armstrong ~ 2003) on ClassicComputers.

If anyone wants to contribute to the Rainbow, this is a good place to start.

What next?
The VT100 subsystem needs an overhaul, or a more general approach (see my comments in vtvideo.c).

@Lord Nightmare: how do you dump an open collector chip (arbitrator)?

rfka01 #101816 10/01/15 03:08 AM
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Re-doing vtvideo.c was on my list of stuff to look into, since a project which wanted to integrate some VT100 stuff from MAME/MESS had a license issue with that file (It is GPLV2+ unlike the rest of the vt100 stuff which is BSD; I may need to roll back to an older vtvideo.c from before the license was changed to GPLv2+ as a starting point, unless I can get the contributors to agree to relicense just that one file as 3BSD.)
The DEC rainbow-specific files were not an issue here (and can stay GPLV2+), just the shared vt100-and-rainbow shared video file, vtvideo.c

In fact, since the DEC video ASICs support both interlaced and non-interlaced video, it may or may not be worthwhile to re-write vtvideo.c from scratch anyway, once we have core interlace support working (which I believe is being worked on by Judge).


Anyway, dumping open collector proms isn't too hard: use 20kohm resistors from the prom output pins to vcc(+5v) while dumping. Your programmer may or may not already have internal pull-up resistors on the data bus, so it might not even be necessary.

LN

Last edited by Lord Nightmare; 10/01/15 03:16 AM.

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rfka01 #101850 10/02/15 05:57 PM
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Err, the license was set to GPL after Miodrag asked me in May. I am fine with BSD if this single file slows down development.

The only thing i am uncomfortable with is that people make money by using source code developed in our spare time. Guess a license disclaimer won't stop them...

What was the project you were working on? smile

If there is in fact a rewrite, i am eager to test corner cases i found on the Rainbow-100 (SQUINT, for example, acts like a 'killer poke' on the Commodore CBM).

Some quick notes about the present state of vtvideo -

Code:
- 'interlaced mode' isn't fully understood 
- there are now 2 separate 'device_resets' (...) and
- there is the occasional 'break;' for the VT-100 (see list of unimplemented features in source code)

 'WRITE8_MEMBER(vt100_video_device::dc012_w)'
 'case 0x0c' (..)
 'case 0x0f' (..)

Last edited by Bavarese; 10/02/15 06:43 PM.
rfka01 #101853 10/02/15 07:12 PM
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Hmm. I'll take a look, I was hoping the vt100 tech manual might explain what the dc012 registers all do...

LN


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rfka01 #101865 10/03/15 08:58 PM
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The VT180 Technical Manual helped a lot (EK-VT18X-TM_001 VT180 Technical Man Feb83.pdf).

Most of the timings are present. Chapter 6 covers the inner details of the DC011 and DC012 in painstaking accuracy.

That said, the present, character oriented code works reasonably well (at least the Rainbow 100 path, which could be generalized).

Different termination characters on VT terminals shouldn't pose a problem smile









Last edited by Bavarese; 10/03/15 09:20 PM.
rfka01 #103181 12/21/15 12:03 PM
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Originally Posted By rfka01
News from Jeff Armstrong:

Quote:
I'll have to look at the 190 ROMs, but I'm pretty sure they're unlabeled. In the meantime, I was able to transplant the Turbow-286 card and ROM into another Rainbow and managed to get the system to boot (still having serious issues, though).

I've attached the two ROM dumps. I'm pretty sure that ROM1 is the stock 100B ROM, although my system has a ClikClok installed in between ROM1 and the board (I doubt that'd make a difference in the ROM dump). ROM0 is labeled: "TBSS 1.3" on line 1 and "3ED4" on line two (a checksum perhaps?).

I do have hi-res versions of the Turbow pictures somewhere. I'll have to look, but they should be accessible via the gallery I host. The chips aren't overly interesting, except that there does appear to be a GAL, which will make emulating it a pain. I remember reading that one of the chips, a 286-to-8088 adapter chip, was quite exotic at the time.

I'll let you know when I find the pictures and check for Rainbow 190 ROM labels.


https://dl.dropboxusercontent.com/u/55419307/DEC%20Rainbow%20turbow-286.zip


Earlier in this thread I had posted information from Jeff Armstrong about his TurboW 286 CPU card ... a few weeks ago Rainbow stuff turned up on Ebay that included manuals and disks for the TurboW, the ClikClok RTC module and other things. Here are the scans of the manuals and Teledisk images of the disks, if I get



I'll add Kryoflux dumps as well.

ClikClok Manual

Suitable Systems Hard Disk Solution

TurboW-286

Windows Adaptation Kit

Assorted Software


NCR DMV- DEC Rainbow- Siemens PCD- ITT 3030-Oly People- Acorn A5000- Olivetti M20
rfka01 #103311 12/29/15 12:07 PM
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Thanks for the manuals. TRB286IN.TD0 is a valid CP/M disk and contains TURBOW.COM and TURBOW.CMD.
Unfortunately, 6 other images appear to be broken when i try to mount them under DOS 3.10 ("bad unit error reading drive B"):

Code:
X RBHDREM.TD0 
X SSIHDINS.TD0
X CLIKCLOK.TD0
X DOS310.TD0 
X DOS310SP.TD0 
X RBADAPKT.TD0 : crashes with "FATALERROR: Incorrect layout on track 0 head 0, expected_size=50000, current_size=88368 " 
(TD0 format violation?)


From my experience, it is better to read old disks on the original RX50 drive with the help of Jeff's RBIMG. This results in a plain sector image (no error info, though).

PC-HD drives tend to find errors on disks that are perfectly readable on a well-maintained RX50.

On another note: the CPU-ID program on RBDS31UT.IMD claims we "incorrectly allow interrupts after a change to SS" (see screenshot).



Old 8088 CPUs (before 1981) had this bug. Is that behaviour wanted / correct?

Assembler source from CPU ID 1.42
https://dl.dropboxusercontent.com/u/37819653/BANNISTER/CPUID.ASM

Hunt for FLG_CERR to find the code to exhibit the bug.

Last edited by Bavarese; 12/29/15 01:07 PM.
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