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Re: cpc 6128 - demo [Re: Breiztiger] #115042 04/13/19 07:25 PM
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Why i’m lying ? On a real cpc 6128 the test is all good

I’m french and i may be misunderstood what you say

Re: cpc 6128 - demo [Re: Breiztiger] #115043 04/13/19 07:29 PM
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On a real 6128 with an NEC or ST CPU the test is all good. On a real 6128 with a genuine Zilog CPU the test fails, just as it does in MAME.

Re: cpc 6128 - demo [Re: Breiztiger] #115044 04/13/19 07:29 PM
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hap Offline
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What? no it doesn't mean you were lying.
It just means this test suite is giving different results depending on CPU brand. Does your CPC have a Zilog Z80 or a different one?

Re: cpc 6128 - demo [Re: Breiztiger] #115045 04/13/19 07:49 PM
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Just test on my 6128 with

ST 28400AB1 Z80ACPU 28848 and Zilog Z8400APS Z80 CPU 8631

All are good in test

Re: cpc 6128 - demo [Re: Breiztiger] #115046 04/13/19 07:59 PM
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hap Offline
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Ok, then either that test checks more than X/Y flags, and/or Zilog Z80 differs there per die revision. The guy that tested it on his Zilog and failed the test has a Z840004PSC.

Re: cpc 6128 - demo [Re: Breiztiger] #115054 04/14/19 07:16 AM
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Breiztiger Offline OP
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Just tested with a Zilog Z0840004PSC Z80 CPU 8722

All tests passed

Re: cpc 6128 - demo [Re: Breiztiger] #115055 04/14/19 08:55 AM
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hap Offline
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Well that's just weird, why did it fail on one Z80 but not on yours.

Also, related to MAME, we don't emulate the details in the last paragraph:
Quote
Bits 3 and 5 of the F Register
Woody confirmed that bits 3 and 5 of the flags are copied on all BIT instructions on both a Zilog Z80 and an NEC clone (stated on the link above as being "unverified").

Stuart Brady discovered that how bits 3 and 5 of the flags are set after the SCF and CCF instructions actually depends on the variant of Z80 in use. On a Zilog Z80, bits 3 and 5 of the flags were set by ORing their previous values with that of A. On an NEC clone, bit 3 was unaffected, while bit 5 appears to be set by ANDing the previous value with something unknown. Previously, Ian Greenway tested this and found that bits 3 and 5 seemed simply to be copied from A, although it is not known which CPU these tests were run on. For more details, see here, here and a more recent investigation here.

Patrik Rak however later discovered that the way how the flags 5 and 3 are affected after SCF/CCF actually depends on the previous instruction completed. In case of genuine Zilog CPU, if an instruction modifies the flags, the immediately following SCF/CCF does move of bits 5 and 3 from A to F, whereas if an instruction doesn't modify the flags (and after interrupt), the SCF/CCF does OR of bits 5 and 3 from A to F. In case of NEC and other clones, it is similar, except that instead of OR it does AND with some unknown value, making the result unreliable.

Re: cpc 6128 - demo [Re: Breiztiger] #115060 04/14/19 05:20 PM
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Breiztiger Offline OP
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hi

crtc bug this time

10 ' Glagla
20 SPEED INK 100,100:MODE 0:BORDER 0:INK 0,0:INK 1,26,2:OUT &BC00,8:OUT &BD00,1:PRINT:PRINT:PRINT:PRINT:PRINT:PRINT" Si je tremble : C'est de froid.":CALL &BB06

screen must scramble a little

Re: cpc 6128 - demo [Re: Breiztiger] #115061 04/14/19 05:31 PM
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We are well aware that we don't support CPC advanced raster effects. Please allow time for the carpenters to fix basic things like disk loading before becoming too demanding.

Re: cpc 6128 - demo [Re: Breiztiger] #115343 05/26/19 09:35 AM
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hi

i think you have problem with fdc 765

http://www.cpc-power.com/index.php?page=detail&num=16166

doesn't success on copy A: to A:

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