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rfka01 #107329 09/17/16 09:43 AM
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@Crazyc: i am curious. How did you figure out the various bit masks (for "offset") in VRAM_W? Via schematics?

I am thinking of statements like
Code
WRITE16_MEMBER(vt240_state::vram_w)
{
...
	offset = ((offset & 0x30000) >> 1) | (offset & 0x7fff);

Last edited by Bavarese; 09/17/16 01:30 PM.
rfka01 #107332 09/17/16 02:18 PM
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In https://archive.org/stream/bitsaver...ce_Print_Set_19Oct1983#page/n20/mode/1up address line 14 is ignored while 15 and 16 are routed to other circuitry.

rfka01 #107351 09/19/16 05:27 PM
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Palette and Vsync statements are in place now.

I had modest successes with freeware games PACMAN, DOODLE and SCRAM (the last one displays a monochrome intro pic with too much space in between).

Text seems totally broken (right to left). Guess "hgdc_draw_text" must be implemented, first eek

[Linked Image from dl.dropboxusercontent.com]

Could someone have a look at the offsets in "vram_w" and "hgdc_display_pixels", please?

https://dl.dropboxusercontent.com/u/37819653/BANNISTER/2016_09_19_RAINBOW_CPP.txt

Without schematics or intimate knowledge of the 7220, it seems too much trial & error (i do not even own the hardware).

Perhaps there a circuit diagram of the Rainbow-100 graphics option (part number should be 54-15688 or PC1XX-BA)...?

Last edited by Bavarese; 09/19/16 06:35 PM.
rfka01 #107358 09/20/16 09:29 AM
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We actually have schematics here.

I'd appreciate hints, though (see previous post) smile

There is also a 'new' piece of DEC hardware i encountered during my search, the so-called Mini-Exchange. It was a serial 8 port serial X switch with DOS support (Xattach, XDetach). Sort of an early Laplink.

Thanks to all uploaders (wink Rfka).

Last edited by Bavarese; 09/20/16 09:31 AM.
rfka01 #107391 09/23/16 12:39 PM
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Wow, 2 of 13 tests from Graphics Diagnostic Disk pass (presence detect, FIFO). smirk

Ok, the PAL array already dumped does some modifications on bits before they are written back to the bit map memory (guess: ALU / plane select).

Now i am unsure about the 7220 clock. Is it really (E31) 31.188 Mhz / 4 = 7.797 Mhz ...?

A 31.188 quarz does not seem to exist in XTAL.H...

Datasheets says "7220 is available in 4.0 , 5.0, and 5.5 Mhz versions, 7220A in 6.0, 7.0, and 8.0 Mhz"


[Linked Image from dl.dropboxusercontent.com]

Pic: there is a plethora of good tests for different 7220 modes (complete with explanations and loop option...just press ALT for Help or L to loop after a failure)

Last edited by Bavarese; 09/23/16 01:27 PM.
rfka01 #107392 09/23/16 01:19 PM
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That diagnostic could be useful for sorting out some of the dark corners of the 7220 emulation.

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Originally Posted by R. Belmont
That diagnostic could be useful for sorting out some of the dark corners of the 7220 emulation.

True, but that "erratic interrupt" failure is slightly alarming. Depending on how demanding the tests themselves are, it could be a real pain to get them all passing, which is something that I'm encountering currently with the Fairlight CMI driver.

rfka01 #107444 09/27/16 07:41 PM
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The NEC 7220 is rather complex, and several features are missing in the current code (RMW cycles for example).

I now have a playable version of SCRAM... only the diagnostic disk is unimpressed. There is certainly a long way to go.

BTW, i found a good article by Guido Dampf (from 1986, in German) about the inner workings of this chip, with Turbo Pascal source. An abridged version in English is somewhere, too.

Crazyc, do you happen to know it?

I plan to submit my current status soon and hope for improvements by others. As stated above, Pacman, Doodle and Scram offer fine test cases (apart from the GDC diagnostic disk).

[Linked Image from dl.dropboxusercontent.com]

Last edited by Bavarese; 09/27/16 07:55 PM.
rfka01 #107446 09/27/16 07:54 PM
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This makes me want to poke a the quad qbus 7220 board that came in the Calcomp branded Terak that I have again. Problem is I have no software for it.

Bavarese #107447 09/27/16 07:59 PM
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Originally Posted by Bavarese
The NEC 7220 is rather complex, and several features are missing in the current code (RMW cycles for example).
We do do rmw cycles for everything except the case where the whole byte/word is written directly, we just to them too fast (which may need to be fixed for the 9801 but nothing else seems to be that timing sensitive).
Originally Posted by Bavarese
Crazyc, do you happen to know it?
German? Nope.

Last edited by crazyc; 09/27/16 08:00 PM.
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