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Re: Kaypro 10 [Re: rfka01] #111964
01/01/18 05:18 PM
01/01/18 05:18 PM
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rfka01 Offline OP
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Right, the chips are socketed on my Kaypro HD controller, so now we know 1015 is an 8049, if someone can come up with a positive identification of the WD1010, I can try to dump them.

Last edited by rfka01; 01/01/18 07:49 PM.

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Re: Kaypro 10 [Re: rfka01] #111965
01/01/18 06:11 PM
01/01/18 06:11 PM
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rfka01 Offline OP
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Hmmm ... a forum dedicated to East German computers identifies the WD1010 as an Intel 82062 although that means going round in circles ... http://pdf.datasheet.live/a693bb51/intel.com/82062.pdf unless it's known what MCU type is behind the 82062.


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Re: Kaypro 10 [Re: rfka01] #111966
01/01/18 07:14 PM
01/01/18 07:14 PM
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Al Kossow Offline
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there is a block diagram of the wd1010 on page 209 of wd1984storageProducts_02.pdf

there is no microprocessor. the 82062 is probably a clone of the WD controller impementation

Re: Kaypro 10 [Re: rfka01] #111967
01/01/18 08:32 PM
01/01/18 08:32 PM
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R. Belmont Offline
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It's a hard logic state machine? Interesting. Seems like it would be cheaper as a microcontroller. Also that means we'd be even more interested in durgadas' Java code.

Also, what's the path for wd1984storageProducts_02.pdf? I looked all over pdf/westernDigital/.

Re: Kaypro 10 [Re: R. Belmont] #111968
01/01/18 08:46 PM
01/01/18 08:46 PM
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Al Kossow Offline
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Originally Posted by R. Belmont
It's a hard logic state machine? Interesting. Seems like it would be cheaper as a microcontroller.

Also, what's the path for wd1984storageProducts_02.pdf? I looked all over pdf/westernDigital/.


under http://bitsavers.org/components/westernDigital/_dataBooks/

Re: Kaypro 10 [Re: rfka01] #111969
01/01/18 08:48 PM
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rfka01 Offline OP
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P.211 has the actual block diagram ... is a PLA controller really hard wired? The document says "The PLA interprets commands and provides all control functions. It is synchronized with WCLK".


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Re: Kaypro 10 [Re: R. Belmont] #111976
01/02/18 06:20 PM
01/02/18 06:20 PM
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somewhere else entirely
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Olivier Galibert Offline
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somewhere else entirely
Originally Posted by R. Belmont
It's a hard logic state machine? Interesting. Seems like it would be cheaper as a microcontroller. Also that means we'd be even more interested in durgadas' Java code.

Also, what's the path for wd1984storageProducts_02.pdf? I looked all over pdf/westernDigital/.


The wd floppy controllers are firmware-based, but the firmware drives a very specialized core and not a generic mcu. For instance the wd1772 firmware is (almost) 256x14 bits (which I only partially understand mind you :-) So it's not a hard logic state machine either.

Re: Kaypro 10 [Re: rfka01] #111996
01/03/18 12:18 PM
01/03/18 12:18 PM
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Bavarese Offline
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There is already a working high level WD1010 implementation in WD2010. It does not incorporate the 256 x 14 firmware O.Galibert mentions (and might not be up to your standards in other regards) - but works reasonbly well with the Rainbow-100 driver.

Reads and writes are initiated by certain lines (BCS, WG, BCR, DATA REQUEST) - just like on real hardware.

In fact, i took 'wd1984storageProducts_02.pdf' and compared the WD1010 and WD2010 and followed the flow diagrams (except for low level formatting, which is futile).

On the Rainbow-100, there are 4 routines to interface the WD controller. Let me highlight the routines (from 'rainbow.cpp'):

Code
// READ SECTOR (on BCS 1 -> 0 transition)
WRITE_LINE_MEMBER(rainbow_state::hdc_read_sector)
{
	static int last_state;

...
--------------------------------------------------------------------

// WRITE SECTOR
// ...IF WRITE_GATE (WG) TRANSITS FROM 1 -> 0

// NO PROVISIONS for  sector sizes != 512 or MULTIPLE DRIVES (> 0) !!!
WRITE_LINE_MEMBER(rainbow_state::hdc_write_sector)
{
	int success = 0;
	static int wg_last;

...
--------------------------------------------------------------------

// Buffer counter reset when BCR goes from 0 -> 1
WRITE_LINE_MEMBER(rainbow_state::hdc_bcr)
{
	static int bcr_state;

...

--------------------------------------------------------------------

// DATA REQUEST - When high (..) initiates data transfers
// to or from the sector buffer. On a READ, this signal
// goes high AFTER the sector buffer is filled.

// On a WRITE / FORMAT command, signal goes high when the WD1010
// chip is READY TO ACCESS the information in the sector buffer.
WRITE_LINE_MEMBER(rainbow_state::hdc_bdrq)
{
	static int old_state;

...

Only differences i found between the WD1010 and the WD2010 are some reseved bits (unused in WD1010 and given a new meaning on the WD2010). The WD2010 covers larger disks (2048 sectors instead of 1024).

Bugs / limitations are given in the header of 'wd2010.cpp'. Note that the routines were only tested with 1 hard disk attached.

If you want to extend, improve or rewrite the thing, i won't object (as long as the Rainbow-100 isn't affected), The first implementation - from 2010 - was a bit too simple to pass the picky WD test routines (rx50diag.td0) supplied by DEC.

Last edited by Bavarese; 01/03/18 12:39 PM.
Re: Kaypro 10 [Re: rfka01] #111997
01/03/18 01:09 PM
01/03/18 01:09 PM
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durgadas311 Offline
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Just to reiterate, my code is a high-level emulation of the entire WD1002-HDO controller. I have no insights into the LSI chips that make up the controller. My code is based on the WD1002-05/HDO OEM Manual, which mainly just describes how the controller responds to commands.

Re: Kaypro 10 [Re: rfka01] #111998
01/03/18 01:47 PM
01/03/18 01:47 PM
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R. Belmont Offline
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@Bavarase: and the Convergent Miniframe needs all the features wd2010.cpp doesn't support, including multi-sector reads. So I'd like to see durgadas311's code :-)

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