The IO ports appear to have been used very consistently across the alphatronic P* range:
00 SID/SOD control signal
(printer port, 4800 Bd., 2 stop bits, 8 data bits)
01 - 03 * reserved
04 - 05 USART CPU
(freely programmable serial port, 8251 based, 600 - 9600 Bd.)
06 - 07 * reserved
08 - 0F * reserved
10 - 17 Keyboard scan / combination interface (video)
18 - 1F * reserved
28 - 2F IEC interface
30 - 4F - not used
50 - 57 Floppy
58 - 5F - not used
60 - 6F * reserved
70 - 77 - not used
78 - 79 paging for CP/M use
7A - 7F * reserved
80 - C7 - not used
C8 - CF * reserved
D0 - DF - not used
E0 - E7 * reserved
E8 - EF * reserved
F0 - FF * reserved
P2 U and P3 support regular CP/M use with a full 64K RAM complement.
Still, the video RAM is at 0x3000 and 0x3ffff even for these machines, and from what I've read they also use the routine present in the ROM monitor, the MOS.
That means, that in order to update the video RAM and probably other I/O the lower 16K (page 0) are constantly paged in and paged out.
This is accomplished by writing 2FH to port 0x78 in order to switch in the ROM (and assorted, see below) area and by writing 63H to port 0x78 in order to swap the full 64K RAM back in.http://www.waltroper-aufbruch.de/Archiv/pdf/Booten_Alphatronic_P2_cpm.pdf
According to the manual,ftp://ftp.informatik.uni-stuttgart.de/pub/cm/alphatronic/P1_P2_Systemhandbuch_Apr1982.pdf
the values written are 20H and 60H (see page 130 of the PDF), so it's probably the 7th bit that does the switching.
P1, P2 and P2S: no paging
Lower 16K for P1, P2 and P2 S
0x0000 - 0x17ff ROM monitor (MOS)
0x1800 - 0x1bff 1K RAM
0x1c00 - 0x1fff reserved
0x2000 - 0x2fff reserved, belonging to the video card's memory space (video ROM?)
0x3000 - 0x3fff actual video memory
0x4000 - 0x400a reserved
0x4010 - 0xc000 32K RAM
0x4000 - 0x400a reserved
0x4010 - 0xfff 48K RAM
An adapter with RAM at 0x0000 and 0x3fff and the banking logic (see above) is added to the the standard 48K memory card.16K memory card
0x0000 - 0x0fff ROM monitor (MOS)
0x1000 - 0x17ff free
0x1800 - 0x1bff monitor stack (RAM)
0x1c00 - 0x2fff free
0x3000 - 0x3fff video memory
0x4000 - 0xfff RAM
The P3's manual lists the 8085A's operating frequency as 3MHz, the sales brochure lists the system frequency as 6MHz ... nice sales spin on the 8085's halving of the frequency
P1: one 5,25" drive, single sided, double density, 160KB, 40 tracks, 16 sectors / track, 256 bytes/sector, "according to IBM 34" (sales brochure)
P2: two 5,25" drives, single sided, double density, 160K (see above)
P2 S: two 5,25" drives, double sided, double density, 320K, 40 tracks, 16 sectors / track, 256 bytes/sector, "according to IBM 34"
P2 U: two 5,25" drives, double sided, double density, 320K, 40 tracks, 16 sectors / track, 256 bytes/sector, "according to IBM 34"
P3: two 5,25" drives, double sided, quad density, (or double track, as the sales brochure puts it), 785K,77 tracks, 5 sectors / track, 1KB/sector, 3 system tracks
P4: one 5,25" drive, double sided, quad density, 785K (see above) and one 15MB (12,5MB formatted) hard disk
P3 and P4 support data transfer from the lower spec machines:
On the P3, drive B: and on the P4 the single drive A: can access single sided disks from a P2 and the first side of the double sided disks from a P2 S and P2 U as a pseudo drive "P".
For emulation purposes, adding a third single sided DD drive to those machines would probably be the way to go.CP/M on P2 S (48K machine without bank switching)
There is a CP/M version with its TPA at 0x4300 in order to support the OS on the simpler machine.
CP/M programs have to be adapted in order to use that setup.