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Missing cursor


Here I have the original development documents from sks to the DISPLAY CONTROLLER for the KISS PC. A slight revision was made by TA for the alphatronic P2 series. And also used for the TA P3 / P30 systems.
Hardware (memory usage) and the software ratings are always almost identical.

Display schematic / software parameters

In my revision of the MATRIX I have now the Ctrl function available.
Via Esc key and another key, a Ctrl code is sent. That was exactly the same with TA. From the cp / m operation, this kind works properly.

The cursor on 6845 systems is the responsibility of the draw callback; the 6845 itself just tells you where it is, not what style it is.

The Alphatronic P2's use crt5027, P3 and P30 crt5037, i.e. TMS9927 ... does it work with them the same way? I couldn't find an example where a driver that uses these chips explicitly sets a cursor.

helwie44 mentioned that on a P3 (which uses 80 track floppies) you can insert a P2 disk (40 tracks, single sided) or P2S/P2U (40 tracks, double sided), and as long as your files are on the first side of the floppy, you can import these via the "Pseudo drive" P:
MAME lets me mount the image, but I get a BDOS error ... is this the same double stepping problem as with 360K disks in 1.2M drives on PC drivers?

The 8085's RST lines are used in the Alphatronics, 7.5 connects to the keyboard system, 6.5 is vsync ("Bildimpuls-Lücke") and 5.5 hsync ("Zeilenimpuls-Lücke"). According to helwie44 connecting these will help the P2 driver continue from its current waiting (HLT) state.
For the vsync signal, the source contains the line
Is this all that's needed or is there additional code required?

Currently, the vram is setup as . helwie44 says, the vram should be readable from the main cpu as well as from the display controller. Would changing to AM_RAM AM_SHARE do the trick?

In order:

- I'm unfamiliar with how the cursor works on the 9927.
- This is the same double-stepping problem. You cannot read discs in MAME on a drive that isn't an exact geometry match, period.
- The 9927 implementation in MAME doesn't have an HSYNC callback or output. One will need to be added. VSync is fine as-is.
- The VRAM is fine as-is, I think. It looks at a glance like both the CPU and display controller can access it. If the CPU really can write it, then yes, AM_RAM AM_SHARE works.

crt5027 iirc is also used on the xerox notetaker, and it needs the vblank, hblank and odd/even pins to be emulated to work properly. Currently we only do vblank (and maybe hblank), which causes major issues since the odd/even field pin is used as an interrupt source on the notetaker.

The Odd/even pin when in interlaced mode stays active for one field and inactive for the next field (and each field is only displaying the odd or even lines).
In non-interlaced mode, the odd/even pin is the lsb of the scanline number, so it inverts every scanline.
I guess technically the odd/even pin is ALWAYS the lsb of the scanline number, just the scanline is incremented by 2 in interlaced mode, and 1 in non-interlaced mode.

The notetaker uses the interlaced mode.

LN

Just wanted to say thanks to Carl ... a CURSORY glance had shown that he had been busy

@LN ... it would be great if you could as HSYNC to the graphics chip.

Carl's and AJR's contributions have advanced the state of the Alphatronics emulation in wide leaps ... I will post disk images tomorrow that match the drivers and may help.

The P2 series now shows signs of life after the provision of a HSYNC signal from the TMS9927 driver.
All you need is a little patience, as it takes a while for the MOS prompt to show up.



From here you can boot into two regions on the disk using the B (in the case of this disk a BASIC dialect) and B1 (here shown with a disk utility) commands.



A speciality of the TA P2 and P2S is the existence of a CP/M with a TPA at 0x4300 that uses no bankswitching and keeps the MOS ROM below.



The P2U has the same bank switching logic as the P3 and can boot a "full" 64K CP/M



In MAME, the P2 varieties and P3 share most of their code, so at the moment even the lowly P2 can boot the 64K CP/M.

The Alphatronics' cursor moves back to line 1 (and then down the screen again) if you go beyond line 24 of the text screen.



So at the moment the next challenges are (and help is again most welcome)

* fix the cursor movement
* give the P2 line its proper video chip, the 5527 instead of the 5537
* seperate the P2 models better (single sided vs. double sided, remove bank switching in P2 and P2S but keep for P2U)
* check why video using the HSYNC is slowing down the system
* fix data exchange between P3 and P2

I thought I could get around the double stepping problem by allowing the P3 to switch to a DSDD drive, but even then I get a BDOS error if I try to access P2 disks via the pseudo drive P:

Unfortunately this is practically unavoidable. The HSYN output has to turn on and then off at a set period during every scanline, including during the vertical sync and blanking period. Currently this timer is disabled when the HSYN callback isn't configured, since many systems use it only to drive the monitor or not at all (since the actual device also generates a composite sync output).

I rather doubt that VSYN is really meant to be inverted. The TMS9927's VSYN output is active high, and the 8085 RST 6.5 input is also triggered at a high level both on actual hardware and in MAME (which generally treats IRQ lines as active high, even though they happen to be active low on actual hardware more often than not).

And the slowdown in the emulation may be due to the wrongly inverted VSYN.

After perusing the Notetaker schematics, I think P2 might be doing something similar to what it does: the video board inverts VSYN to buffer it onto the bus, and the CPU board inverts it yet again to turn it into an active-high interrupt input (though the Notetaker I/O CPU receives it indirectly through a 8259 PIC).