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What label does that 2513 have, btw? can you take a picture of that chip specifically? (I'd like to see the silkscreen markings on the chip, if possible)

EDIT: nevermind, based on the filename, it is the 'common' part, RO-3-2513 CGR-001 (though the filename calls it gcr-001, I assume this is a typo)

LN

Last edited by Lord Nightmare; 08/28/18 12:58 AM.

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rfka01 Offline OP
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Yes, sorry for the typo. You can see the part with its silkscreening in the post about the 8.2 video card that has a link to the higher res pictures.


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The WD1793 floppy controller is at 0xC0H and controls a 3.5" 40track 8 sec/track 512 bytes/sector drive ... it would be great if a kind soul could add that ...

http://oldcomputers-ddns.org/public...ve/mfa_-_floppy_disk(seiten_einzeln).pdf

0xC0H is the control/status port, 0xC1H is the track register, 0xC2H the sector register and 0xC3H the data register. 0xC8H halts the CPU to give the floppy time to shove its data in and RST5.5 signals the CPU the FDC is ready for the next command.

For the moment, the 64K configuration of the MFA is emulated in MAME with a neat cut at 8000H, below is ROM, above RAM.
With some solder strapping, the cards can also be populated with 64K RAM and a 2K boot EPROM that contains some startup code and the CP/M BIOS. After copying the BIOS to RAM at F200, jumping to that location causes the ROM to be banked out. It's a one-way process, bringing the ROM back in requires a reset.

Is there a driver that does bank switching like this? I'd love to take a look ...


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Yes, the some of the mac 68k drivers do a bank-out of the rom data on boot using a 'overlay control' bit connected to one of the VIAs; the rom actually remains in the map, but before the 'overlay disable' bit gets toggled, the rom appears at the boot vector area 0x000000-0x1ffffff(???), and toggling that bit makes it map only at 0x400000-0x5fffff or so.


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rfka01 Offline OP
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Thanks LN, I'm trying to chew my way through mac128.cpp ... I had hoped for a simpler example as the MFA is only a lowly 8085 wink

Basically the driver needs to find out when the 8085's PC hits 0xF200H.


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Originally Posted by rfka01
Basically the driver needs to find out when the 8085's PC hits 0xF200H.


No, it needs to find out when there is a fetch from F200H... smile

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rfka01 Offline OP
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Quote
No, it needs to find out when there is a fetch from F200H... smile


Yeah, that's more correct. The MFA's CP/M manual says

"The boot program copies the BIOS part of the EPROMs to RAM starting at F200. The CPU branches to F200 and reads a command there. By this read operation (not by the command read as such) the Boot-EPROM is switched off and the RAM from 0000 to 07FF that was not usable until now is banked in."


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So, you would just have a read handler at F200 which both returns the byte of RAM that's there, and performs the bank-out operation if it hasn't been banked out yet.

Then from 0000-07FF in the memory map, you would have a bank device mapped, which in its internal map has ROM from 0000-07FF and RAM from 0800-0FFF, and a bank stride of 0800H. On startup you set its bank index to 0, and to bank out the ROM, you set its bank index to 1 and store a value to a member indicating that it has been banked out, so you don't attempt to bank it out again.

Look at src/mame/drivers/vii.cpp or src/mame/drivers/clcd.cpp for examples on how to use a bankdev.

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rfka01 Offline OP
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Having some terminology problems ...

From vii.cpp:

Code
map(0x1000000, 0x13fffff).r(FUNC(vsmile_state::bank0_r))


the read handler would be "bank0_r" in this example?


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No, you would do it like this: https://gist.github.com/MooglyGuy/0c7096a78d87947a184b3c4be7d85e4e

I haven't tested it other than to make sure it compiles, and I might have derived the machine config from the wrong machine - I wasn't sure whether to derive it from the '85 or not - but in theory all you should need to do is plug in the ROM definition.

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