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I strongly recommend against using willem or willem-derived programmers, they've fried more mcus and roms over the years than I can count.
For 8048 chips you need to be very careful not to over-volt the /EA pin or you can blow the pin (or the mcu) up.

LN


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@Vas check for jumps to C946
Otherwise, harmless mistake by the coder?

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It just occurred to me, do we even know which printer this Grappler ROM is supposed to work with? The “EPS-1” label suggests some kind of Epson protocol. Is there a list of known ROM labels and supported printers?

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In the Grappler Manual, it lists DIP switch settings for specific printers:

ANADEX 9500 - 9301
All switches on S—3 must be off. Set switches on S-l snd S—2 appropriately.
CENTRONICS 739-1
All four switches oust be off.
EPSON MX-70
Shorting plug must be hooked up to the red post for no auto—line feed.
EPSON MX-80; MX-SOFT with Graftrax-80
All switches on S-2 should be off. Dip switch S-l, switch 8 must be on and switch 3 must be off.
EPSON MX—100
S—2 switch 3 must be off
S—1 switch 6 must be off and switch 8 must be on.
I.D.S. 440G - 445G
S—4 switches 5, 6 and 7 Must be off
S—3 switches 6 must be on and switch 7 must be off
Strapping for 440G — 445G (locate beside I.D.S. cable connector)
9-6 - busy active when high 11-5 — strobe data on positive edge 14—1 — always remain installed
I.D.S. 460G - 560G
S-4 switch 5 must be off and switch on S—3 switches 6 and 7 off
Strapping for 4600—5600 (locate beside I.D.S. cable connector)
Must be strapped as shipped.
8—7 installed for parallel
11— 4 installed for busy rising high
12— 3 installed for negative going strobe

I've seen a label for a NEC-1 c1981 rom.

[Linked Image from i.imgur.com]

Anadex used an interesting protocol for their dot graphics:
https://www.manualslib.com/products/Anadex-Dp-9500-4104328.html

Last edited by Golden Child; 04/08/21 01:16 PM.
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Some tidbits about the bufferboard:

Apparently there were 3 different versions:

https://archive.org/details/TheBufferboardManualAppleIIGrapplerEpsonAppleParallel/page/n1/mode/2up


[Linked Image from i.imgur.com]


Interestingly, this brochure says that the Buffered Grappler + is not Apple III compatible.

Maybe it has something to do with the 6M / 7M clock thing?

This bufferboard brochure says that the BufferBoard is Apple III compatible.

[Linked Image from i.imgur.com]

https://archive.org/details/GrapplerBufferboardBrochureAppleII1983OrangeMicro

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I think it's more likely that it can work on the ///, but the firmware's not usable and by 1982 it was pretty clear the machine wasn't going anywhere so they didn't want to write a driver. The Bufferboard's a special case since it only uses the slot for power and can't communicate with the host Apple.

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Been looking at prograppler:


A little lua program to unswap the bits to make it more sane: a2/a3, a6/a7 and d3/d4
Code
function swapbits(x,a,b) local abit, bbit   abit = (x & (1<<a))>>a bbit = (x & (1<<b))>>b  x = x & (~(1<<a)) & (~(1<<b)) x = x | (bbit << a) | (abit << b) return x end

f = io.open("prograppler_2.1_27c256.bin") a = f:read("*a")  f:close()
b = {} for adr = 0,#a-1 do    eff = swapbits(swapbits(adr,2,3),6,7)  b[adr]=swapbits(a:byte(eff+1),3,4) end
g = io.open("prograp21swap.bin","w") for i=0,#b do g:write(string.char(b[i])) end g:close()

write c080 sends data to printer (does strobe automatically)
write c081 sets the bank:
a11 = d0,
a13 = d1,
a14 = d2,
a12=d3


read c080 is status and a few of the dip switches:
d0=ack status,
d1=pin25/select
d2=pin23/PE,
d3=pin21/busy
d4=sw1
d5=sw2
d6=sw3
read c083 is switches 4 to 6:
d0=sw4
d1=sw5
d2 = sw6

bank 0F is to read the ram possibly, since it has all zeroes in the rom
writes to c800-cfff always go through directly to the ram.


comparing 2.1 to 1.1 it looks reasonably sane:
Code

0c800: 18        clc                                            0c800: 18        clc
0c801: b0 38     bcs $c83b                                      0c801: b0 38     bcs $c83b
0c803: 90 25     bcc $c82a                                      0c803: 90 25     bcc $c82a
0c805: 38        sec                                            0c805: 38        sec
0c806: 90 18     bcc $c820                                      0c806: 90 18     bcc $c820
0c808: b0 20     bcs $c82a                                      0c808: b0 20     bcs $c82a
0c80a: 00        brk                                            0c80a: 00        brk
0c80b: 01 14     ora ($14, x)                                   0c80b: 01 14     ora ($14, x)
0c80d: 89 6e     nop #$6e                                       0c80d: 89 6e     nop #$6e
0c80f: 71 7a     adc ($7a), y                                   0c80f: 71 7a     adc ($7a), y
0c811: 4c 7b cd  jmp $cd7b                                    | 0c811: 4c d9 cc  jmp $ccd9
0c814: 2c ff cf  bit $cfff                                      0c814: 2c ff cf  bit $cfff
0c817: 4c 94 cd  jmp $cd94                                    | 0c817: 4c f2 cc  jmp $ccf2
0c81a: 99 81 c0  sta $c081, y                                   0c81a: 99 81 c0  sta $c081, y
0c81d: 60        rts                                            0c81d: 60        rts
0c81e: 78        sei                                            0c81e: 78        sei
0c81f: 2c ff cf  bit $cfff                                      0c81f: 2c ff cf  bit $cfff
0c822: 4c a0 cd  jmp $cda0                                    | 0c822: 4c fe cc  jmp $ccfe
0c825: 99 81 c0  sta $c081, y                                   0c825: 99 81 c0  sta $c081, y
0c828: 58        cli                                            0c828: 58        cli
0c829: 6b 8d     arr #$8d                                       0c829: 6b 8d     arr #$8d
0c82b: 78        sei                                            0c82b: 78        sei
0c82c: 04 08     nop $08                                        0c82c: 04 08     nop $08
0c82e: 8a        txa                                            0c82e: 8a        txa
0c82f: 48        pha                                            0c82f: 48        pha
0c830: 98        tya                                            0c830: 98        tya
0c831: 48        pha                                            0c831: 48        pha
0c832: 78        sei                                            0c832: 78        sei
0c833: 08        php                                            0c833: 08        php
0c834: 20 58 ff  jsr $ff58                                      0c834: 20 58 ff  jsr $ff58




so it looks like it copies the bank switching code into the ram chip

Code
c8f1: 20 fb c9  jsr $c9fb


0c9fb: a0 49     ldy #$49
0c9fd: c8        iny
0c9fe: b9 a5 cf  lda $cfa5, y
0ca01: 99 a5 cf  sta $cfa5, y
0ca04: 88        dey
0ca05: d0 f7     bne $c9fe


and when it runs the bank switch, it sets the bank to 0F by writing to c081,y and then starts executing from the ram bank.


Code
0cfa5: 60        rts
0cfa6: ad f8 07  lda $07f8
0cfa9: 0a        asl a
0cfaa: 0a        asl a
0cfab: 0a        asl a
0cfac: 0a        asl a
0cfad: a8        tay
0cfae: 60        rts
0cfaf: 48        pha
0cfb0: 98        tya
0cfb1: 48        pha
0cfb2: 8a        txa
0cfb3: 48        pha
0cfb4: 20 a6 cf  jsr $cfa6
0cfb7: a9 0f     lda #$0f
0cfb9: 99 81 c0  sta $c081, y
0cfbc: ba        tsx
0cfbd: bc 03 01  ldy $0103, x
0cfc0: bd 06 01  lda $0106, x
0cfc3: 48        pha
0cfc4: 4a        lsr a
0cfc5: 4a        lsr a
0cfc6: 4a        lsr a
0cfc7: 4a        lsr a




Code
U1 dip switches sw1-sw6
U2 74ls173 4 bit d-type register (stores the current bank, feeds to a11,a12,a13,a14)a11 = d0,a13 = d1,a14 = d2,a12=d3
U3 74ls20 dual 4 input nand gate (1 of the gates is used to nand all the bank bits)
U4 27c256 32k eprom chip
U5 74ls240 octal buffers (used to read sw4-sw6)
U6 74ls00 quad nand
U7 74ls30 8 input nand (used to decode CFFF to disable C800-CFFF memory (only 8 bits decoded so CFF0-CFFF will disable)
U8 74LS373 octal latch (used to read status bits and sw1-sw3)
U9 74ls139 dual 2 to 4 decoder (decodes device memory access c080-c083)
U10 74ls08 quad and
U11 6116 2k ram chip
U12 74ls374 octal d type flip flop to output data to printer
U13 74ls08 quad and
U14 74ls74 dual d type flipflops, used to do the printer strobe
U15 74ls279 quad sr latches, used to handle ack status from printer
U16 74ls00 quad nand
U17 74ls32 quad or
U18 74ls245 bidirectional octal bus transceiver with 3 state outputs, used to isolate memory bus
U19 74ls126 quad 3 state buffer

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Here's preview emulation of one of the newest Apple II mass storage cards, the BOOTI.

[Linked Image from rbelmont.mameworld.info]

This card is interesting because it uses an off-the-shelf circuit module called a CH376, which was made to give Arduino-type systems access to files on a USB thumb drive or SD card. It has USB 2.0 and SD Card interfaces, and on the host side it allows you to create, enumerate, read, and write files on those devices via a command set that largely mirrors C stdio's FILE * operations. There are 3 host interfaces which you can use to do this: async bit serial, 4-wire SPI for Arduino/Pi/modern microcontrollers in general, and a Z80-ish 8-bit bus interface (8 data lines, chip select, read and write enable lines, one address line, and an IRQ output).

The heart of the CH376 is a 28-pin SOIC chip also labeled "CH376". There is no external ROM on the module (which is actually pretty tiny). So I've made it an HLE device which directs accesses to a directory on MAME's host system. My current idea is to add a share_directory to mame.ini which this and potentially other host file sharing implementations can use. With the existing firmware, this isn't exactly host file access, but the card has 64K of flash ROM space available, and it's fully rewritable from software (I've even tested reflashing the card in MAME, it works fine).

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I saw this pic on ebay:

"Grappler powered" Apple II

[Linked Image from i.imgur.com]
[Linked Image from i.imgur.com]

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Hah, I've never seen that before.

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