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Just wanted to subscribe to this thread and be notified in case the black screen issue gets resolved. Keep up the good work guys.


The developers of MESS have my sincere gratitude. Thank you guys.
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as long as you add the "-cart cdsys" option, there is no issue in MESS: games just work

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Kale Offline OP
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3 years this thread not being updated, heh.

Fixed Snatcher booting bug:

[Linked Image]

[Linked Image]

Also apparently the hangs are mostly caused by the raster IRQ having slightly off timing, for sure I can confirm it's a common issue for Dragon Slayer, XSerd, Conan, Image Fight 2, Air Zonk ...

[Linked Image]

Could it be a CPU core bug?

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RCR IRQ typically happens near the end of HDW period, V-blank IRQ typically happens near the beginning of HDW period after VDW period ends. I never got around to testing the exact timing, and the specifics of what happens with non-typical register values are kind of complicated(from a high-level perspective, a least). There are some games with "four-screen" codes, that when entered cause the games to use very non-typical register values for the pixel clock mode being used.

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...which I apparently already said more or less a couple of years ago. I blame a certain someone for pestering me. ;p

Four-screen codes for testing/reference:
https://www.gamefaqs.com/tg16/588930-coryoon/cheats
https://www.gamefaqs.com/tg16/588944-digital-champ/cheats
https://www.gamefaqs.com/tg16/578558-shadow-land/cheats

Last edited by Mednafen; 09/24/17 04:28 AM.
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Kale Offline OP
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Ok, thanks for the tips wink
I'll try something in these days, pretty sure it's not triggering at the end of the HDW anyway.

As for four screen mode, it's goofy even on real HW:

[Linked Image]

This is how it looks in MAME, it also doesn't "speed-up" like it should (on real HW it's totally unplayable like this lol):

[Linked Image]

The whole CRTC stuff doesn't seem well tested anyway, I looked at some of the Chris Covell stuff and they are mostly misaligned or incorrect:

[Linked Image]

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I suspect that there may be a hidden internal counter in the VDC that upon expiration forces some sort of (early) horizontal line sequence restart regardless of input signals from the VCE(the signals from the VCE would still be used to reset/initialize the hidden counter), and that lines are long enough in the 10MHz pixel clock mode for it to be relevant. But it's just a hypothesis, haven't really tested it. Also IIRC, average CPU->VRAM write performance is disproportionately higher in the 10MHz pixel clock mode.

Last edited by Mednafen; 09/25/17 07:18 PM.
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maybe the 4 screen thing generates weird signals and only works with certain displays?

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Kale Offline OP
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Looks like it's still off one line or something:

[Linked Image]

[Linked Image]

Logic seems to be otherwise right, there is stuff that still doesn't work but might really be timing (or CRTC parameters not being right)

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Kale Offline OP
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Let's bring this thread back to life, crosspost for reference: https://forums.bannister.org/ubbthreads.php?ubb=showflat&Number=122051#Post122051

Removed a spurious redbook start/end irq trigger in command, breaking attract mode functionality in Macross 2036 (MT#5995), J. League Tremendous Soccer '94, Iga Ninden Gaou

[Linked Image from mamedev.emulab.it]

[Linked Image from mamedev.emulab.it]

[Linked Image from mamedev.emulab.it]

ETA: Popful Mail too
[Linked Image from mamedev.emulab.it]

Last edited by Kale; 03/08/23 10:36 PM.
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