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Joined: Feb 2021
Posts: 30
Member
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Member
Joined: Feb 2021
Posts: 30 |
Good job! There are many Amiga marked as not working. That needs to be all done so that it can changed to working. Also need catch up with WinUAE. I am currenting using WinUAE at this time.
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Joined: Aug 2009
Posts: 1,330 Likes: 253
Very Senior Member
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Very Senior Member
Joined: Aug 2009
Posts: 1,330 Likes: 253 |
Context should've been obvious but anyway: looking around the AGA entries, now that I have some way to run the interesting stuff. Pinball Brain Damage (Amiga CD, WHDLoad available) is an odd one: table 2 ball gets stuck if it hits the top left reel, missing HW collision detection extra stuff? ![[Linked Image from mamedev.emulab.it]](http://mamedev.emulab.it/kale/fast/files/0065_6348161967.png)
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3 members like this:
Waremonger, R. Belmont, Dullaron |
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Joined: Aug 2009
Posts: 1,330 Likes: 253
Very Senior Member
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Very Senior Member
Joined: Aug 2009
Posts: 1,330 Likes: 253 |
CIA8520 memes (a.k.a. the I don't really comprehend this chip section)
- batman1 (Ocean Batman budget) writes a 0 to all TOD registers for even CIA (the one counting from hsync), wait for 1 vblank sequence then pretends that TOD is higher than > 0x115. With current logic this can't possibly never get right (i.e. I tried several CPU speed combinations and never got a bit 8 high), TOD stay in latched state between these two events.
- cardiaxx / cardiaxxa keeps looping at a timer B check that never trigger ICR bit 1 (game makes sure to mask all irqs by then). Specifically it writes 0x48 / 0x49 (TA with run mode) where m_count_b2 gets first set by m_ta_out then cleared by a mask if crb bit 0 is off. Note that this definitely isn't protection: it does the exact same thing with WHDLoad version ...
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1 member likes this:
Waremonger |
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Joined: Nov 2003
Posts: 808
Senior Member
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Senior Member
Joined: Nov 2003
Posts: 808 |
- batman1 (Ocean Batman budget) writes a 0 to all TOD registers for even CIA (the one counting from hsync), wait for 1 vblank sequence then pretends that TOD is higher than > 0x115. With current logic this can't possibly never get right (i.e. I tried several CPU speed combinations and never got a bit 8 high), TOD stay in latched state between these two events. I'd have thought you'd get 312 hblanks between vblank on pal and 262 on ntsc. Which I presume is what it's trying to detect
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Joined: Nov 2003
Posts: 808
Senior Member
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Senior Member
Joined: Nov 2003
Posts: 808 |
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