Okay, here's the schematic (full size version here
You have to figure out the pins by yourself though, sorry for that.
It basically uses 2 or 3 latches (74LS373) to set an arbitrary address to the address lines of the EPROM and then reads back the data through the (EPP) parallel port.
The trick is that you select the a chip via the strobe and select signals. The 74LS138 then enables exactly one of the three 74LS373s, or, if you set strobe and select to 1, it enables the data output of the EPROM so you can read the data back.
Reading a byte goes something like this:
set parallel port to output
set strobe,select to 0
output lower 8 bits of address to lpt
set strobe,select to 1
output upper 8 bits of address to lpt
optionally, if your ROM has more than 16 address bits:
set strobe,select to 2
output 8 more address bits to lpt
set strobe,select to 3
set parallel port to input
read 1 byte of data from parallel port
...rinse&repeat with the next address
You have to use a DLL for direct access to the lpt port on windows, I used this one
As soon as I find the source code I'll post it, too.
(for the electronic nerds: yes I know this is not a completely clean design, because at one time there are two chips driving data onto the bus at the same time, but it did work for me...)
*Edit: For those who are interested, I dumped a few ROMs some years ago before I threw out the hardware. They are available here
, maybe they are useful for something in MESS, dunno. The ZIP file contains the BIOS and ROM Debugger from a Zenith XT, two different TurboXT ROMs, an AWARD 286 Modular BIOS (V3.03 NFS 11/10/87), the Phoenix BIOS from a Commodore PC (80386SX BIOS Rev. 1.03), A NetWare BOOT ROM for an ArcNet card (archaic! ;-) and some other harddisk- and floppy-controller ROMs)