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with some useful informations by christian bauer and with the source of frodo emulator, i have rewritten the vic ii emulation in mess; the new source is not released: i wait for christian bauer permission: in the docs christian say:

"The rights on the source code remain at the author. It may not - not even in parts - used for commercial purposes without explicit written permission by the author. Permission to use it for non-commercial purposes is hereby granted als long as my copyright notice remains in the program. You are not allowed to use the source to create and distribute a modified version of Frodo."

this is not a modifed version of frodo, and is not a commercial purpose: probably i can use the code with the copyright notice

for a perfect sync between m6510 and vic ii i need yet a modified version of the m6510/6502 core: i think, in the current core, the RDY signal is not emulated

RDY: if this line is low during a read access, the processor stops with the address lines reflecting the current address being fetched. It is ignored during write access.

In the c64, RDY is used to stop the processor if the VIC needs additional bus cycles for character pointer and sprite data accesses

i try to understand the best way to proper implement th RDY feature (maybe someone have suggestions )


very nice to see sprites in the border
http://mamedev.emulab.it/robiza/wp-content/uploads/2009/08/0003.png

Awesome

Very nice!

after discussion with other devs the real solution is microcode support

a workaround can be:

in static CPU_EXECUTE( m6502 )

if (RDY)
old CPU_EXECUTE
else
first_cycle = actual_cycle
first_read_cycle = 0
index = 0
old CPU_EXECUTE

in ops02.h
in every read operation

if ((RDY == 0) & (first_read_cycle == 0))
read_cycle[index++] = counter_cycle - first_cycle

counter_cycle must be updated like a microcode
i.e.
#define BRA(cond)
{
INT8 tmp2 = RDOPARG();
counter_cycle += 2; if (cond)
{
RDMEM(PCW);
counter_cycle += 1;
EAW = PCW + (signed char)tmp2;
counter_cycle += 1;
if ( EAH != PCH ) {
RDMEM( (PCH << 8 ) | EAL) ;
}
counter_cycle += 1;
PCD = EAD;
counter_cycle += 1;
}
}

when the opcode is executed i have the first cycle and all the cycles with read istructions
i can calculate how many cycles should be recovered when the cpu is resumed

i think this is a hack and for now we can't have the right sync between cpu and vic (some raster effect can't be properly emulated and some games can hangs)

That's excellent news! Out of curiosity, will you eventually provide emulation of the variants listed here?

for now there's support for 6567R8 and 6569
i have info about 6567r56a
for other chips i don't have any docs

MOS Technology 6566 � designed for SRAM/non-muxed address lines (used in the Commodore MAX Machine)
http://nocash.emubase.de/pagezero.htm
http://ftp.giga.or.at/pub/c64/library/VIC-Article
http://www.cebix.net/VIC-Article.txt
http://www.unusedino.de/ec64/technical/project64/users_guide2.html
http://www.commodore.ca/manuals/c64...ammers_reference_guide-07-appendices.pdf
http://unusedino.de/ec64/technical/misc/vic656x/colors/index.html

MOS Technology 8566 � VIC-II E (PAL-B) C128 version
http://www.c128.net/album/interlace/index.htm
http://cd.textfiles.com/blackphilesii/PHILES/HARDWARE/PAL.ZIP
http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/pal.timing
http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/656x-luminances.txt

Interesting:

http://www.geocities.com/hydradix/C128/Interlace.htm

Really not much, so far, but what's easily found is there.

thank you, stiletto

and a good news; i have a answer from christian bauer
http://frodo.cebix.net/
http://www.cebix.net/
with the permission to use the frodo code

the code will be committed in few hours

committed the code:

here a sample about the little problem with sync between vic ii (gfx chip) and m6510 (cpu)

Turrican loaded in a PAL machine (c64pal)

http://mamedev.emulab.it/robiza/wp-content/uploads/2009/08/0014.png

the cpu is not suspended at the right time; the lines are not perfect

fixed CIA TOD: now frogger music is correct