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Olivetti M20 emulation status? #78739 04/30/12 09:03 AM
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rfka01 Offline OP
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Hi everybody,

I just got two M20's and was able to get one working.
The last time I checked MESS, the M20 driver froze with the "faulty CPU" sign showing on screen.
I'll get some documentation as well (although it seems that most is available on line).

I'll gladly help to find any information needed to get this driver working.

Robert




NCR DMV- DEC Rainbow- Siemens PCD- ITT 3030-Oly People- Acorn A5000- Olivetti M20
Re: Olivetti M20 emulation status? [Re: rfka01] #78744 05/01/12 09:46 AM
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You can see the current driver here: http://git.redump.net/mess/tree/src/mess/drivers/m20.c

It says something about needing a proper Z8001 CPU core. The CPU emulation is located at: http://git.redump.net/mess/tree/src/emu/cpu/z8000/z8000.c

And says about the Z8001:

* TODO:
* - make the z8001 opcodes to be dynamic (i.e. to take segmented mode flag into account and use the non-segmented mode)
* - dissassembler doesn't work at all with the z8001

So thats likely one of the problems.

Re: Olivetti M20 emulation status? [Re: rfka01] #78746 05/01/12 03:40 PM
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This guy P8000 emulator has created a MAME derivative with a Z8001 core that seems to address the issues you mention.

The installer comes with the sources, and the README claims that they can be distributed and changed.

It would be great if they could be incorporated into MESS.

Robert


NCR DMV- DEC Rainbow- Siemens PCD- ITT 3030-Oly People- Acorn A5000- Olivetti M20
Re: Olivetti M20 emulation status? [Re: rfka01] #78747 05/01/12 03:54 PM
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It's based on quite ancient MAME, and he hacked in his own equivalents for a lot of things MESS provides for computers (even at that time). Plus all of his modules freely share internal state with each other (the Z8001, the driver, the video hardware, the floppy controller, they've all got their hands on each others' jocks). And there's random bits of Win32-only code sprinkled throughout the proceedings. It's still on my todo list to port the whole thing to modern MESS, but it's not a fast, easy, or pleasant task.

Re: Olivetti M20 emulation status? [Re: rfka01] #78748 05/01/12 04:02 PM
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rfka01 Offline OP
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Ooops ;-)

One thing that puzzles me about MAME/MESS is that the "Computer" sources reside in the "drivers" directory whereas the "Components" are in "machines" ...


NCR DMV- DEC Rainbow- Siemens PCD- ITT 3030-Oly People- Acorn A5000- Olivetti M20
Re: Olivetti M20 emulation status? [Re: rfka01] #78749 05/01/12 04:20 PM
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"machines" is a hangover from DOS 8.3. "machine components" would be a more accurate description.

Re: Olivetti M20 emulation status? [Re: rfka01] #78862 05/07/12 08:31 PM
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rfka01 Offline OP
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Just saving that Shoutbox conversation for posterity:

R. Belmont: the issue with the M20 input ports assert is likely blowback from the input ports rewrite, it hit MESS especially hard
z8001cpg: thanks
z8001cpg: how to fix the input ports assert?
R. Belmont: I don't know, I don't have the source in front of me right now - who wrote the M20 skeleton, maybe they would know?
R. Belmont: hmm. looking at the source in the git viewer, it appears m20 doesn't have any input ports. I'm guessing that may be an edge case Aaron doesn't handle
R. Belmont: you could always try adding a bogus port and seeing if that quiets things down
AaronGiles: Lack of ports should not be fatal, but I didn't suddenly make it so (I don't think). Just add a dummy one for now.
R. Belmont: z8001: just open some other driver that does have ports defined between INPUT_PORTS_START and INPUT_PORTS_END and copy/paste them to the right place in m20.c

Last edited by rfka01; 05/07/12 08:49 PM.

NCR DMV- DEC Rainbow- Siemens PCD- ITT 3030-Oly People- Acorn A5000- Olivetti M20
Re: Olivetti M20 emulation status? [Re: rfka01] #78961 05/10/12 08:32 PM
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Ok, I found the reason for the bootstrap memory test failure.

It fails at address 0. In MESS address 0 has a mirror of the ROM BIOS which resides at segment 4 (address 0x40000).

I don't know how it works on the real machine, but on the real machine at address 0 is RAM. I think some reset circuitry does some magic, in order that the processor finds its reset vector at address 0.

To proceed I would like to mirror the ROM BIOS at address 0 as _RAM_. Is this possible? I looked at some drivers, but couldn't come up with a solution. Are these AM_RANGE, AM_MIRROR, ROM_REGION, etc. defines somewhere documented?

Re: Olivetti M20 emulation status? [Re: rfka01] #78962 05/10/12 08:43 PM
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The easy cheat is just to copy the reset vector from ROM to RAM in the MACHINE_RESET handler.

How to handle it properly depends on how the hardware works. On m68k systems there was often a special I/O address that swapped in the RAM (e.g. the Amiga and some early Macs). Some others simply switched the RAM in automatically when the "real" address of the ROM was first accessed (most Macs are this way).

Re: Olivetti M20 emulation status? [Re: rfka01] #78963 05/10/12 10:43 PM
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The technical manual explains how it works:

Quote:
The *RESET signal presets the boot ROM enable flip-flop. The *BOOT signal inhibits the action of the translated address signals TA14, TA15, TSN0 and *ROM and takes the ROM decoder select inputs A, B & C low via the AND gates and the G1 input high via the NAND gate. This sets the decoder data output Y0 low and enables the EPROM. The EPROM is then addressed to start the bootstrap operation. Three consecutive memory read cycles are executed in the system mode. The first reads the FCW from location 0002, the second reads the 7 bit PC segment number from location 0004 and the third reads the 16 bit PC offset from location 0006 (see Figure 2-10). The last IF cycle starts the initialization program. On completion of the program, address bit A3 is active, the boot ROM enable flip-flop is reset, and normal addressing is resumed.

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