Unfortunately that isn't possible right now; we need a cycle-by-cycle 68k core that can break out of the read/write and let the scheduler run until the read/write is ready. This is also a pain point for certain things in the Mac driver (Apple used a PAL that allows MOVEing 2 or 4 bytes at a time from the 8-bit-wide SCSI chip; it doesn't tick DTACK until all the bytes are ready from the SCSI bus).

Right now you can either make it so the transaction magically happens immediately, or if that's not possible you can wait on those features until the new core is ready.