Just a small update on my work on the VME bus. I have used the Nubus and ISA bus drivers as role models and tried to make a top down design based on those but there has been too many bus specifics in those drivers that are irrelevant for the VME bus. So I am doing a revamp of the whole thing and starting from scratch with a bottom up design based on my understandings so far.

The direction I have is to model the VME adress spaces (A16, A24, A32 and A64) independently of the address space of the CPU board and map slot devices into those. This is not nearly enough considering the Address Modifiers (AM) but it is a start. The AM allows to differentiate addresses based on access type like program vs data vs I/O fetches and Non-Privileged vs Supervisory and many more. I guess I have to create a separate address space for each since thay can overlap but I will start with a single fixed one and hope for the best.

I will also consider to use the Besta driver as main candidate since there seems to be a full set of software there to use, adding the SCSI-1 board as the first VME slave board. I am also working on a template VME driver and VME slave board, I may submit those too without include them in the build.

Because I can