far as I can see from the docs, the non-Force boards are
Code:
cp31	= cp30 + rtc
	68030, 68882 @ 33 MHz
	68153 BIM	$FF800800
	68230 PIT	$FF800C00
	68561 MPCC	$FF800000
	62421 RTC	$FF800A00
	Centronics	$ff800200 ???
	:
	32KB 0ws SRAM	$FF04xxxx..$FF07xxxx
	256KB EPROM	$FF00xxxx..$FF03xxxx
	:
	MPCC #2, #3	$ff800200, $0xff800600	optional, on SRAM daugtherboards

cp33	=
	68030, 68882 @ 25 or 33 MHz
	EPROM -- 512KB, 1MB or 2MB
	DRAM -- up to 64MB
	:
	console MPCC	$FF800000		only in prototypes, later models move console to 2681
	68153 BIM	$FF800800
	68230 PIT	$FF800C00
	62421 RTC	$FF800A00
	WD33C93A SCSI	$FF801000 & $FF810000 (dma)
	i82077 FDC	$FF801200
	CENC (parallel)	$FF800200
	SCN2681		$FF801400
	IRQRG		$FF801600
	Am7990 LANCE	$FF820000

hcpu30	=
	68030, 68882 @ 33 MHz
	68020 -- I/O cpu
	:
	DRAM -- 4 or 16 MB
	PROM -- up to 64 KB
	SRAM -- 8 KB non-volatile or 32 KB volatile
	:
	2xRS232/RS422	$FFFF8120, $FFFF8140
	SCSI		$FFFF8160
	Floppy		$FFFF8260
	Centronics	$FFFF8280
	RTC		$FFFF8100
	Ethernet	$FFFF82A0


Linux port supports CP20, CP30, CP31 and HCPU. Don't know what SysV supports -- there are boot floppies for that, too.

Last edited by shattered; 11/06/16 09:56 PM.