Finally fixed the last(?) bug in the Hazeltine 1500 netlist code. It wasn't actually a bug in the netlist code that was hanging me up, I had the Am2847 Quad 80-bit Shift Register implemented with 160 bits instead. No wonder it looked like the lines were taking twice as long to clock out.

[Linked Image from i.imgur.com]

More importantly, this means the netlist system is now capable of accessing ROMs loaded by MAME, and between that and the devices I've added, there are only 10 or 11 (depending on how you count) logic ICs standing between now and being able to netlist Stunt Cycle. smile