Although my 6502 books don't seem to mention it, it looks like indirect indexed mode does a read from the effective address.

From the MAME source:
https://git.redump.net/mame/tree/src/devices/cpu/m6502/om6502.lst
Code
sta_idy
	TMP2 = read_pc();
	TMP = read(TMP2);
	TMP = set_h(TMP, read((TMP2+1) & 0xff));
	read(set_l(TMP, TMP+Y));
	write(TMP+Y, A);
	prefetch();

Another reference:
https://github.com/eteran/pretendo/blob/master/doc/cpu/6502.txt
Code
Indirect indexed addressing
Write instructions (STA, SHA)

        #    address   R/W description
       --- ----------- --- ------------------------------------------
        1      PC       R  fetch opcode, increment PC
        2      PC       R  fetch pointer address, increment PC
        3    pointer    R  fetch effective address low
        4   pointer+1   R  fetch effective address high,
                           add Y to low byte of effective address
        5   address+Y*  R  read from effective address,
                           fix high byte of effective address
        6   address+Y   W  write to effective address

       Notes: The effective address is always fetched from zero page,
              i.e. the zero page boundary crossing is not handled.

              * The high byte of the effective address may be invalid
                at this time, i.e. it may be smaller by $100.