I think I understand now what Vas was saying that the ack flip flop on the a2 PIC can't work since the strobe gets sent to the flip flop on the SD input which for the duration of the strobe makes it ignore the ack signal which is coming in on the CLK input.


Is it possible for things to get "jumbled" out of order? I put a bunch of printf to display the current machine time and it looks like it thinks the ack came in before the strobe was sent:



Code
nack=1  busy=1    datalatched=0
Time = 31.588152
[:sl1:parallel] /ACK=0
WRITE_C004_TIME: time = 5.289714e+00  usec ':sl1:parallel:prn:ap2000:maincpu' (20A6)

nack=1  busy=0    datalatched=0
Time = 31.588157
WRITE_C004_TIME: time = 5.289714e+00  usec ':sl1:parallel:prn:ap2000:maincpu' (20AC)

nack=0  busy=0    datalatched=0
Time = 31.588162
[:sl1:parallel] /ACK=1
[:sl1:parallel] Active /ACK edge
[:sl1:parallel] Setting acknowledge latch
[:sl1:parallel] Time = 31.588162
[:sl1:parallel] Diff = 0.000047
[:sl1:parallel] Read C0n0
[:sl1:parallel] Write C0n0=00
[:sl1:parallel] Latch data 00
[:sl1:parallel] Output /STROBE=0 for 1 cycles
[:sl1:parallel] Time = 31.588338                      <<< sent at .588338
[:sl1:parallel] Clearing acknowledge latch
WRITE_C004_TIME: time = 1.607259e+02  usec ':sl1:parallel:prn:ap2000:maincpu' (20A0)

nack=1  busy=1    datalatched=0
Time = 31.588323                                 <<<< so the ap2000 sees the data at .588323
[:sl1:parallel] /ACK=0
WRITE_C004_TIME: time = 5.289714e+00  usec ':sl1:parallel:prn:ap2000:maincpu' (20A6)

nack=1  busy=0    datalatched=0
Time = 31.588328
WRITE_C004_TIME: time = 5.289714e+00  usec ':sl1:parallel:prn:ap2000:maincpu' (20AC)

nack=0  busy=0    datalatched=0
Time = 31.588334
[:sl1:parallel] /ACK=1
[:sl1:parallel] Active /ACK edge
[:sl1:parallel] Active strobe prevents acknowledge latch from being set
[:sl1:parallel] Time = 31.588334
[:sl1:parallel] Diff = -0.000005                   <<<< time difference is negative???
[:sl1:parallel] Output /STROBE=1