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I'd like to try to hook up the bus logic and get it talking to another card in the VME address space but I'm not sure how well the VMEbus emulation in MAME works, or if it works at all. It doesn't look like it's hooked up in any of the other VME slot devices.
The VMEbus emulation is a plain address map that currently only support different bus widths, not daisy chaining or dynamic bus cycles or the other VME signals. If you look at the devices/bus/vme/vme_mzr8300.cpp you can see how to hook up 8 bit read/write handlers from an I/O board into the memory map of the CPU board devices/bus/vme/vme_mzr8105.cpp. The intention is that you need a CPU board that can access the VME bus spaces as required for the I/O board or the I/O board would not be able to add itself in a chassi.
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The firmware and manuals are all on Bitsavers and m88k. Unlike the later MVME SBCs, the 120’s bus logic is all in PALs and TTL.
This is a lot of work and fun but it is not yet supported by the VME bus system to set the different signals and affect how devices can access each other. It would however be very useful to get the signals visible even if they are disregarded, that would help us to build a working emulation. Currently there are ASIC:s, FPGA:s and TTL/PLA clusters that has been started but not finished to reveal the signals. Also we have no software that relies on the function of these specific signals but the crude address map seems good enough so far.

Last edited by Edstrom; 11/18/21 10:46 AM.

Because I can