They do explain how the MMU works (second PDF, pages 27-31). POST uses it to test memory outside 640K range. There's also simpler memory banking hardware, driven via port 0x73 (same PDF, page 36).
poisk2 is a XT clone with RTC (mc146818 clone), 640K or 2MB memory (with built-in EMS support). It's not as interesting as poisk1, but has a hardware workaround for bad memory chips -- address lines are routed via SRAM and POST uses this to exclude them from linear addressing. You could probably build a multitasking DOS around that