Right. There is +12/-12 pair in the function above... Again, not exactly my coding style.
PSR transfers are rare, true, and this is exactly why it needs to be re-checked. Any frequently used instruction being wrong would crash the emu right away. I'm browsing .122 sources w/o patches of any kind, and I have code that looks like this:


if (insn & 0x00010000)
newval = (newval & 0xffffff00) | (val & 0xff);
if (insn & 0x00020000)
newval = (newval & 0xffff00ff) | (val & 0xff00);


// force valid mode
newval |= 0x10;

//Update the Register
SET_REGISTER(reg, val);

//Switch to new mode if changed
if( (val & MODE_FLAG) != oldmode)

I belive it's supposed to be newval in that SET_REGISTER, ane the line below.

As for base writebacks in block transfer - as I said, this doesn't look right but should not be happening in any sane code.
The problem is when you store the base register too and writeback is specified. If the base is on the list it needs to be stored already modified by writeback. Unless it's the first register on the list, then it's stored as-is.