I can expect that most of them fails their test, but the CG RAM failing is quite bogus...?

Are you buffering CGRAM accesses properly? When you write the first value it gets stored in a buffer, and it writes the 15-bit pair on the second write. Writing to $2121 clears the "latch" so to speak so that the next write after will be buffered. Reads are immediate, however. d7 of every second read returns the PPU2 MDR, or open bus.

How about wrapping around? After writing to $2122 at $01ff, it wraps back to $0000.

We're lucky that the test doesn't try writing to CGRAM during active display, heh.