Heh, blargg and I just spent eight hours researching the S-SMP TEST register. You guys are going to give up and quit when you see just how complex it really is, heh. It is, without a doubt, the craziest 8-bit register I've ever seen in my life. And we're still going.http://byuusan.kuro-hitsuji.net/blargg_2010-03-14.zip
What about the timing sync stuff between S-CPU and S-SMP/APU? I thought someone tried to test that and blew up their copier or something bad like that? I'm not even sure how that's possible...
My UFO 8.3j's RAM stopped working after trying it. Probably a bus conflict damaged it. It came back to life after 1.5 years of disuse, too. It may have been a coincidence, but at $200 a pop, I wasn't going to try again.
blargg tried it on hardware, it ORs between the old value and new value, but only on some bits, and only some of the time. Need pseudo-randomness and an extreme timing system to simulate it. Bit-perfect emulation of it is a misnomer.