This should fix it:

Code
rene@thunder:~/src/mame-svn> svn diff 
Index: src/emu/cpu/es5510/es5510.c
===================================================================
--- src/emu/cpu/es5510/es5510.c (revision 20723)
+++ src/emu/cpu/es5510/es5510.c (working copy)
@@ -137,8 +137,8 @@
 
 static inline INT32 SX(INT32 x) { return (x & 0x00800000) ? x | 0xff000000 : x & 0x00ffffff; }
 static inline INT32 SC(INT32 x) { return x & 0x00ffffff; }
-static inline INT64 SX64(INT64 x) { return (x & (0x0000800000000000)) ? x | 0xffff000000000000L : x & 0x0000ffffffffffffL; }
-static inline INT64 SC64(INT64 x) { return x & 0x0000ffffffffffff; }
+static inline INT64 SX64(INT64 x) { return (x & (0x0000800000000000LL)) ? x | 0xffff000000000000LL : x & 0x0000ffffffffffffLL; }
+static inline INT64 SC64(INT64 x) { return x & 0x0000ffffffffffffLL; }
 
 static inline const char * const REGNAME(UINT8 r) {
   static char rn[8];
@@ -369,12 +369,12 @@
     break;
 
     /* 0x03 to 0x08 INSTR Register */
-  case 0x03: instr_latch = ((instr_latch&0x00ffffffffff) | ((INT64)data&0xff)<<40); logerror("ES5510: Write INSTR latch[5] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
-  case 0x04: instr_latch = ((instr_latch&0xff00ffffffff) | ((INT64)data&0xff)<<32); logerror("ES5510: Write INSTR latch[4] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
-  case 0x05: instr_latch = ((instr_latch&0xffff00ffffff) | ((INT64)data&0xff)<<24); logerror("ES5510: Write INSTR latch[3] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
-  case 0x06: instr_latch = ((instr_latch&0xffffff00ffff) | ((INT64)data&0xff)<<16); logerror("ES5510: Write INSTR latch[2] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
-  case 0x07: instr_latch = ((instr_latch&0xffffffff00ff) | ((INT64)data&0xff)<< 8); logerror("ES5510: Write INSTR latch[1] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
-  case 0x08: instr_latch = ((instr_latch&0xffffffffff00) | ((INT64)data&0xff)<< 0); logerror("ES5510: Write INSTR latch[0] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x03: instr_latch = ((instr_latch&0x00ffffffffffLL) | ((INT64)data&0xff)<<40); logerror("ES5510: Write INSTR latch[5] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x04: instr_latch = ((instr_latch&0xff00ffffffffLL) | ((INT64)data&0xff)<<32); logerror("ES5510: Write INSTR latch[4] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x05: instr_latch = ((instr_latch&0xffff00ffffffLL) | ((INT64)data&0xff)<<24); logerror("ES5510: Write INSTR latch[3] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x06: instr_latch = ((instr_latch&0xffffff00ffffLL) | ((INT64)data&0xff)<<16); logerror("ES5510: Write INSTR latch[2] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x07: instr_latch = ((instr_latch&0xffffffff00ffLL) | ((INT64)data&0xff)<< 8); logerror("ES5510: Write INSTR latch[1] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
+  case 0x08: instr_latch = ((instr_latch&0xffffffffff00LL) | ((INT64)data&0xff)<< 0); logerror("ES5510: Write INSTR latch[0] = %02x -> %012" I64FMT "x\n", data, instr_latch); break;
 
     /* 0x09 to 0x0b DIL Register (r/o) */
 
@@ -424,7 +424,7 @@
     break;
 
   case 0x80: /* Read select - GPR + INSTR */
-    logerror("ES5510: Read INSTR+GPR %02x (%s): %012" I64FMT "x %06x (%d)\n", data, REGNAME(data & 0xff), instr[data] & 0xffffffffffffL, gpr[data] & 0xffffff, gpr[data]);
+    logerror("ES5510: Read INSTR+GPR %02x (%s): %012" I64FMT "x %06x (%d)\n", data, REGNAME(data & 0xff), instr[data] & 0xffffffffffffLL, gpr[data] & 0xffffff, gpr[data]);
 
     /* Check if an INSTR address is selected */
     if (data < 0xa0) {
@@ -444,9 +444,9 @@
 
   case 0xc0: /* Write select - INSTR */
     DESCRIBE_INSTR(buf, instr_latch, gpr[data]);
-    logerror("ES5510: Write INSTR %02x %012" I64FMT "x: %s\n",data, instr_latch&0xffffffffffffL, buf);
+    logerror("ES5510: Write INSTR %02x %012" I64FMT "x: %s\n",data, instr_latch&0xffffffffffffLL, buf);
     if (data < 0xa0) {
-      instr[data] = instr_latch&0xffffffffffffL;
+      instr[data] = instr_latch&0xffffffffffffLL;
     }
     break;
 
@@ -587,7 +587,7 @@
       if (mulacc.write_result) {
        mulacc.product = (mulacc.cValue * mulacc.dValue) << mulshift;
        mulacc.result = (mulacc.accumulate ? machl : 0) + mulacc.product;
-       INT32 tmp = (mulacc.result & 0x0000ffffff000000) >> 24;
+       INT32 tmp = (mulacc.result & 0x0000ffffff000000LL) >> 24;
        if (mulacc.dst & SRC_DST_REG) {
          machl = mulacc.result;
          write_reg(mulacc.cReg, tmp);

A mind is like a parachute. It doesn't work unless it's open. [Frank Zappa]