Some systems in MESS cannot currently be emulated because they wire the WDx7xx so that it halts the CPU when its busy, and then the firmware/software doesn't need to ever busy-wait for the controller. If the RX50 is actually wired that way, you might be in trouble, but the fact that multiple OSes do boot already suggests that that isn't the case. It would be useful to trace on the schematics exactly what causes the RX50 to assert WAIT though.
In essence, those scenarios were the reason why I introduced the feature to split read accesses in the address map (set the address bus, then read), for the sake of those systems that get suspended in the middle of a memory read. The TMS99xx emulations prove to work that way
Maybe this could be ported to other systems as needed; I'd be ready to help.
