Thanks for all ideas & suggesstions so far!

@R.Belmont: different OS employ different bootstrapper strategies, don't they?
At least with CP/M 2, another loader kicks in on track 2 (and that's when the trouble starts...)

With the knowledge i have now, i see two following TODOs:

- eliminate the need to employ a gross hack to activate the keyboard grin

- wire the READY signal correctly (floppies aren't always READY on the Rainbow...)

- implement a connection between HLT and HLD (head load timing and head load). It isn't there now in 'wd_fdc'.
Besides, how can i properly RESTORE with the current code?

- make improvements on the RAM access logic because the 'bundle cards' (at least the COMM OPTION board; maybe also the WD based hard disc controller?) require DMA.

See the signals labeled with BDL for BUNDLE at extension port J4 - and in the schematics attached.

Possibly a hardware guru can tell what the undocumented B1-03 (E13) is capable of...?

The Z80 gets WAIT - but i don't see how the (external) RX50 board - on connector J1 (see see link in previous posting) - could possibly affect it -

Last edited by Bavarese; 05/27/14 06:53 PM.